High-k dielectric trench lateral double-diffused metal oxide wide bandgap semiconductor field effect transistor and method of making the same

Abstract

The invention provides a lateral double-diffused metal oxide wide-gap semiconductor field effect transistor (LDMOS) with a high-K dielectric (High-K Dielectric Pillar, HK) trench and a manufacturing method thereof. The device mainly forms a deep groove high-K dielectric layer at the drain end of the device, the lower end of the high-K dielectric layer goes deep into the epitaxial layer on the device substrate, and the upper end is connected with the drain electrode on the device surface. When the device is turned off, the uniform electric field of the HK dielectric trench reduces the peak high electric field generated by the cylindrical junction under the device drain, optimizes the longitudinal electric field distribution of the device, and improves the breakdown voltage of the device; moreover, the high-K dielectric Layer and wide bandgap semiconductor material substrate form a MIS capacitor structure, which can effectively assist in depleting the charge in the substrate when the device is turned off, effectively improving the doping concentration of the substrate under a certain withstand voltage of the device, that is, reducing the substrate resistivity.

Description

technical field [0001] The invention relates to the field of power semiconductor devices, in particular to a lateral double-diffused metal oxide semiconductor field effect transistor and a manufacturing method thereof. Background technique [0002] Wide bandgap semiconductor materials have the characteristics of large band gap, high critical breakdown electric field, high thermal conductivity and high electron saturation drift velocity, so they have very broad application prospects in the field of high-power, high-temperature and high-frequency power electronics. Lateral power devices have the advantages of easy integration, good thermal stability, good frequency stability, low power consumption, multi-subconduction, small power drive, and high switching speed, and are widely used in PIC (Power Integrated Circuit). At present, the lateral double-diffused metal-oxide-semiconductor field-effect transistor (LDMOS) with a wide bandgap semiconductor material (typically SiC) as th...

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Problems solved by technology

In the design optimization process of lateral power devices such as LDMOS, with the optimization of surface electric field terminal technology, including reduced surface electric field technology (Reduced Surface Field, referred to as RESURF), field plate (Field Plate, referred to as FP) technology, lateral variable doping ( With the application of technologies such as Variation of Lateral Doping (VLD for short), the surface electric field of lateral power devices has been optimized to a certain extent, but there are relatively few technologies for optimizing the vertical electric field of devices.

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