Through-silicon-via technique based three-dimensional band-pass filter

Abstract

The invention discloses a through-silicon-via technique based three-dimensional band-pass filter, which comprises a parallel-plate capacitor unit, a planar spiral inductor unit, a rewiring layer, a three-dimensional solenoid inductor unit and a soft magnetic ferrite unit. The three-dimensional band-pass filter realizes three-dimensional solenoid inductors through on-chip redundancy through siliconvia, and the occupied area of the three-dimensional solenoid inductors is remarkably reduced through the through silicon via in vertical arrangement and metal interconnection layers in horizontal arrangement; by adding of high-permeability soft magnetic ferrite into the three-dimensional solenoid inductors, permeability and inductance density of the three-dimensional solenoid inductors are further improved. The three-dimensional band-pass filter is excellent in high-frequency stop-band suppression characteristic and frequency selectivity and is up to 31.6% in relative bandwidth ratio and up to 100nH / mm<2> in inductor inductance density. The three-dimensional band-pass filter has advantages of small occupied area, low loss and compact size and is applicable to high-performance radio-frequency circuit design and application.

Description

Technical field [0001] The invention relates to the technical field of filter design in microwave circuits, in particular to a three-dimensional band-pass filter based on silicon through hole technology. Background technique [0002] Modern wireless communication equipment and communication systems have the advantages of miniaturization, high speed and multi-function, and usually support different communication protocols. In order to develop such communication equipment and communication systems, the industry has proposed a series of advanced packaging technologies such as system-in-package, on-chip packaging and three-dimensional integration. However, due to the large size of inductors and capacitors, these packaging technologies still cannot integrate RF passive units such as filters, couplers, and antennas into the system. For this reason, CN106158835A proposes a low-pass filter based on through-silicon via technology, using vertical coaxial through-silicon via capacitors ins...

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Problems solved by technology

Although this design method can reduce the size of capacitors and low-pass filters, there are still some shortcomings: First, the coaxial silicon vias used in this patent belong to a non-standard silicon via structure, and its structure includes the first dielectric layer, The outer metal layer, the second dielectric layer and the metal core layer are electrically isolated by filling the first dielectric layer between the silicon substrate and the outer metal layer, and filling the second dielectric layer between the outer metal layer and the metal core layer. The outer metal layer must Grounding, when used as a capacitor design and application, the metal core layer is used as the upper plate electrode of the capacitor, and the outer metal layer is used as the lower plate electrode of the capacitor. This structure determines that the coaxial TSV capacitor is only suitable for grounding capacitor design and cannot be used for coupling Capacitors and band-pass filter designs including coupling capacitors; second, although the low-pass filter has excellent electromagnetic characteristics of coaxial TSVs, its structure is complex and the manufacturing cost is high, so it is not used in mainstream TSVs. It is widely used in packaging technology; thirdly, the inductance density and size of the inductor are the key factors affecting the size of the filter, but the low-pass filter still adopts the traditional planar inductor structure, and its inductance density is low. Experiment (N.Sturcken, et al., A 2.5D integrated voltage regulator using coupled magnetic-core inductors on silicon interposers, IEEE J.Solid-State Circuit, vol.48, no.1, pp.244-254, Jan.2013. ) and simulation data show that the inductance density of the planar spiral inductor is only 40~50nH / mm 2

These redundant through-silicon vias are inserted to meet these design rules. They are not used for effective electrical and thermal conduction in the chip, but they cause additional overhead for the silicon chip area.

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