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A large-scale manufacturing method for cmos-mems integrated chips

A technology of integrated chips and manufacturing methods, applied in the direction of manufacturing microstructure devices, gaseous chemical plating, and techniques for producing decorative surface effects, etc., can solve problems such as high cost and reduced signal transmission quality, and achieve volume reduction, Reduced footprint and reduced signal noise

Active Publication Date: 2021-01-29
INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

The initial integration method of the two is to manufacture MEMS sensors and CMOS integrated circuits separately, and then fix them on a common substrate and wire bonding, but because the signals pass through the bonding points and wires, the quality of signal transmission decreases in high-frequency applications , and the cost is higher

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  • A large-scale manufacturing method for cmos-mems integrated chips
  • A large-scale manufacturing method for cmos-mems integrated chips
  • A large-scale manufacturing method for cmos-mems integrated chips

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Embodiment Construction

[0036] The present disclosure provides a large-scale manufacturing method of a CMOS-MEMS integrated chip. The N well / P well is manufactured in the MEMS region by using the CMOS process of injecting N well / P well, and injecting P+ / N+ into the N well / P well. Manufacturing the piezoresistive part of the MEMS region solves the contradiction that the CMOS process tends to use a P-type substrate while the MEMS resonant cantilever beam manufacturing process tends to use an N-type substrate. This disclosure adopts Inter-CMOS and Post-CMOS technology, organically integrates CMOS technology and MEMS bulk silicon manufacturing technology, completes the fabrication of MEMS electrical structure in the CMOS process, and protects the silicon chip with a passivation layer after the CMOS process is completed, through The MEMS bulk silicon process completes the fabrication of the MEMS resonant cantilever beam, which avoids the influence of the high-temperature process in the conventional MEMS el...

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Abstract

The invention provides a large-scale manufacturing method of a CMOS-MEMS integrated chip, and CMOS technology is combined with the MEMS bulk silicon manufacturing process effectively. The method comprises the steps that A) an SOI substrate which comprises top silicone (1), a buried oxygen layer (2) and bulk silicon (3) is selected and divided into a CMOS circuit area and an MEMS resonant cantilever beam sensor area; B) a CMOS technology is used in the top silicone (1) of the selected SOI substrate in the step A to manufacture a CMOS circuit and an MEMS resonant cantilever beam sensor circuit;and C) gold electrodes and MEMS resonant cantilever beams are prepared to complete preparation of the CMOS-MEMS integrated chip. Inter-CMOS and Post-CMOS technologies are mixed to reduce the parasiticcapacitance of devices and signal noise and improve the stability and yield rate of the devices.

Description

technical field [0001] The present disclosure relates to the field of semiconductor chips and manufacturing, in particular to a large-scale manufacturing method of CMOS-MEMS integrated chips. Background technique [0002] MEMS is the abbreviation of Micro Electro Mechanical Systems, that is, Micro Electro Mechanical Systems. It is developed on the basis of microelectronics manufacturing technology and integrates a variety of microfabrication technologies to achieve the acquisition, processing, control and execution of various information quantities (force, heat, electromagnetic, light, chemistry, etc.). MEMS processing technology mainly uses single crystal silicon substrates and polycrystalline silicon thin films. Combined with photolithography technology, fine two-dimensional and three-dimensional microstructures such as cantilever beams, thin films, channels with high aspect ratios, and inverted pyramid-shaped cavities can be fabricated. Since the 1980s, MEMS technology h...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): B81C1/00
CPCB81C1/0015B81C1/00246
Inventor 赵俊元朱银芳王栎皓杨晋玲杨富华
Owner INST OF SEMICONDUCTORS - CHINESE ACAD OF SCI
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