A semiconductor power transistor with feedback structure, integrated circuit and packaging structure
A technology of power transistors and transistors, which is applied to amplifiers, transistors, and semiconductor devices with semiconductor devices/discharge tubes. It can solve problems such as large chip area, impact on packaging, and signal attenuation, and achieve good high-frequency microwave performance and convenience. Chip packaging, the effect of enhancing broadband characteristics
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Embodiment 1
[0075] Such as Figures 1 to 24 As shown, this embodiment provides a semiconductor power transistor with a feedback structure, including a horizontal structure transistor and a vertical structure transistor, and the horizontal structure transistor includes a gate 1, a drain 2, a source 3, and a gate input terminal 4 , a drain output terminal 5, a grid insert finger 6, the vertical structure transistor includes a base 7, a collector 8, an emitter 9, a base input 10, and a collector output 11;
[0076] The horizontal structure transistor and the vertical structure transistor also include a suppression intrinsic feedback structure and a periodic feedback structure; the suppression intrinsic feedback structure is arranged on the electrode of the semiconductor power transistor for suppressing the Fabry feedback structure of the semiconductor power transistor. Perot FP feedback; the periodic feedback structure is set on the substrate of the semiconductor power transistor, or / and on ...
Embodiment 2
[0080] Such as figure 1 with figure 2 As shown, on the basis of Embodiment 1, further, in the horizontal structure transistor, the structure for suppressing intrinsic feedback includes a source inclined terminal 13 located on the source electrode, a drain inclined terminal located on the drain electrode 14. The inclined source terminal 13 is inclined at an angle relative to the electrode of the gate finger 6, or / and the inclined drain end 14 is inclined at an angle relative to the electrode of the gate finger 6; in a vertical structure transistor, the The intrinsic feedback suppression structure is a physical structure formed by inclining the electrode interfaces of the base electrode 7, the collector electrode 8, and the emitter electrode 9 at an angle that can destroy the parallel relationship of the electrodes.
[0081] In this embodiment, the Fabry-Perot FP feedback can be suppressed by destroying the electrode parallel relationship of the horizontal structure transisto...
Embodiment 3
[0083] Such as Figures 3 to 7 As shown, on the basis of Embodiment 1, further, the periodic feedback structure disposed on the internal substrate of the semiconductor power transistor includes a gain coupling structure based on an active layer or / and a distributed feedback structure based on a passive layer structure.
[0084] Further, in the horizontal structure transistor, the gain coupling structure based on the active layer is the surface of the channel layer on the internal substrate of the horizontal structure transistor, which has a convex-convex structure with periodic depth changes, or / and has a periodic electrical A structure with variable performance; the distributed feedback structure based on the passive layer is the surface of the isolation layer or / and barrier layer on the inner substrate of the horizontal structure transistor, and has a convex-convex structure with periodic depth changes, or / and has periodicity The structure of the change of electrical proper...
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