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Cellular structure of power semiconductor device, and manufacturing method thereof

A technology for power semiconductors and manufacturing methods, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve problems such as low channel mobility of MOSFET devices, increase channel carrier mobility, and increase yield , the effect of high pressure resistance

Active Publication Date: 2020-12-29
湖南国芯半导体科技有限公司
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The cellular structure of a power semiconductor device of the present invention solves the technical problem of low channel mobility of MOSFET devices, improves the device channel carrier mobility, and avoids the influence of gate oxide failure on device reliability

Method used

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  • Cellular structure of power semiconductor device, and manufacturing method thereof
  • Cellular structure of power semiconductor device, and manufacturing method thereof
  • Cellular structure of power semiconductor device, and manufacturing method thereof

Examples

Experimental program
Comparison scheme
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no. 1 example

[0066] figure 2 is a schematic cross-sectional structure diagram of a power semiconductor device according to Embodiment 1 of the present invention;

[0067] image 3 is a schematic diagram of a cross-sectional current path of a power semiconductor device according to Embodiment 1 of the present invention;

[0068] The power semiconductor device of this embodiment, such as figure 2 As shown, it includes: first conductivity type substrate 11, first conductivity type epitaxial layer 12, second conductivity type base region 13, channel layer 14, barrier layer 15, source metal 16, second conductivity type dielectric layer 17. Gate metal 18, drain metal 19.

[0069] The conductivity type adopted by each part in this embodiment can be set as the first conductivity type or the second conductivity type, and the first conductivity type and the second conductivity type are complementary conductivity types.

[0070] In this embodiment, the N type is set as the first conductivity ty...

no. 2 example

[0092] Figure 4 is a schematic cross-sectional structure diagram of the power semiconductor device of the present embodiment 2;

[0093] The power semiconductor device of this embodiment, such as Figure 4 As shown, it includes: drain metal 21, first conductivity type substrate 22, first conductivity type epitaxial layer 23, second conductivity type base region 24, channel layer 25, barrier layer 26, source metal 27, second conductivity type Two-conductivity type medium layer 28 , gate metal 29 , and metal layer 30 .

[0094] The conductivity type adopted by each part in this embodiment can be set as the first conductivity type or the second conductivity type, and the first conductivity type and the second conductivity type are complementary conductivity types.

[0095] In this embodiment, the N type is set as the first conductivity type, and the P type is set as the second conductivity type.

[0096] Wherein, the power semiconductor device includes a MOSFET or an IGBT, an...

no. 3 example

[0119] Figure 5 is a schematic cross-sectional structure diagram of the power semiconductor device of the present embodiment 3;

[0120] The power semiconductor device of this embodiment, such as Figure 5 As shown, it includes: drain metal 31, first conductivity type substrate 32, first conductivity type epitaxial layer 33, second conductivity type base region 34, channel layer 35, barrier layer 36, source metal 37, second conductivity type Two-conductivity type dielectric layer 38 and gate metal 39 .

[0121] The conductivity type adopted by each part in this embodiment can be set as the first conductivity type or the second conductivity type, and the first conductivity type and the second conductivity type are complementary conductivity types.

[0122] In this embodiment, the N type is set as the first conductivity type, and the P type is set as the second conductivity type.

[0123] Wherein, the power semiconductor device includes a MOSFET or an IGBT, and this embodime...

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Abstract

The invention discloses a cellular structure of a power semiconductor device, and a manufacturing method of the cellular structure. The cellular structure comprises: a first conductive type epitaxiallayer positioned on the surface of a first conductive type substrate; second conductive type base regions having preset junction depths and located at two sides of the middle portion of the epitaxiallayer; a channel layer positioned on the surface of the second conductive type base regions and in contact with the middle portion of the epitaxial layer; a barrier layer positioned on the surface ofthe channel layer; a dielectric layer positioned on the barrier layer close to the middle portion of the epitaxial layer and a gate electrode metal positioned on the dielectric layer; a source electrode metal positioned on the barrier layer far away from the middle portion of the epitaxial layer, and isolated from the gate electrode metal by an insulating layer; and a drain electrode metal positioned at the bottom of the first conductive type substrate. According to the invention, by arranging the AlGaN / GaN heterojunction, the channel carrier mobility is greatly increased, the on-resistance isreduced; and the gate oxide layer is not arranged, so that the influence of gate oxide failure on the reliability of the device is avoided, and the device has high voltage endurance capability.

Description

technical field [0001] The invention relates to the technical field of power semiconductor devices, in particular to a cell structure of a power semiconductor device and a manufacturing method thereof. Background technique [0002] Silicon carbide SiC power devices have developed rapidly in recent years due to their excellent material advantages. Device characteristics such as high voltage, high frequency, high temperature and high power density make it a huge market in the field of high-efficiency power conversion, among which the development of metal-oxide-semiconductor field effect transistor MOSFET (metal-oxide-semiconductor field effect transistor) has attracted the most attention. people pay attention. [0003] Traditional SiC planar MOSFET devices have low channel mobility, large on-resistance, high interface state density and poor reliability of the gate oxide layer, and the problems of channel mobility and gate oxide reliability restrict the further development of ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/06H01L29/778H01L21/335
CPCH01L29/0684H01L29/7789H01L29/7788H01L29/66068
Inventor 高秀秀邱乐山李诚瞻齐放戴小平
Owner 湖南国芯半导体科技有限公司
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