Semiconductor structure preparation method and semiconductor structure
A semiconductor and mask layer technology, applied in semiconductor/solid-state device manufacturing, transistors, electrical components, etc., can solve problems affecting pattern transfer, required pattern deviation, bit line contact structure deviation, etc., to avoid alignment deviation effect of shifting, improving alignment accuracy, and improving performance
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[0029] The method for preparing the semiconductor structure provided by the present invention and the specific implementation of the semiconductor structure will be described in detail below in conjunction with the accompanying drawings.
[0030] Figure 1A is a schematic top view of the semiconductor structure provided by the first embodiment of the present invention, please refer to Figure 1A , the semiconductor structure includes a substrate 100 and a mask layer 110 disposed on the substrate 100. When patterning the top mask layer, since the material hardness of the top mask layer is small, the side of the top mask layer The wall will form an arcuate bend (eg Figure 1A The area indicated by the middle arrow A). Then when pattern transfer is performed based on the pattern of the top mask layer, such as Figure 1B and Figure 1C As shown, among them, Figure 1B is a schematic top view of the mask layer 110 of the semiconductor structure, Figure 1C for along Figure ...
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