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Clock gating circuit and clock gating circuit implementation method

A clock gating and circuit technology, applied in logic circuits with logic functions, reliability improvement and modification, generation/distribution of signals, etc., can solve problems affecting SoC chip performance, flipping, damage, etc., to reduce the risk of flipping, The effect of enhancing the radiation resistance

Pending Publication Date: 2022-04-15
SPACE STAR TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Among them, once the clock gating circuit, which is the upper control circuit of the chip clock structure, is affected by radiation particles and rays, it will generate single-event flips and single-event transient pulses, which will affect the downstream subsystems and registers it controls, causing large The flipping of the area, or even damage, will affect the performance of the SoC chip

Method used

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  • Clock gating circuit and clock gating circuit implementation method
  • Clock gating circuit and clock gating circuit implementation method
  • Clock gating circuit and clock gating circuit implementation method

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Embodiment Construction

[0031] In the following description, specific details such as specific system structures and technologies are presented for the purpose of illustration rather than limitation, so as to thoroughly understand the embodiments of the present invention. It will be apparent, however, to one skilled in the art that the invention may be practiced in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of the present invention with unnecessary detail.

[0032] In order to illustrate the technical solutions described in this application, specific examples are used below to illustrate.

[0033] With the development of chip design technology and manufacturing technology, large-scale system on chip (SoC) has become the mainstream of chip development, rapidly occupying the market, and widely used in various fields, such as aviation and aerospace.

[...

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Abstract

The invention provides a clock gating circuit and a clock gating circuit implementation method. The clock gating circuit comprises a state machine, a triple modular redundancy latch circuit and a logic gate circuit, the state machine is used for generating a control state signal according to the state jump triggered by the input control signal and inputting the control state signal into the triple modular redundancy latch circuit; the triple modular redundancy latch circuit is used for latching the control state signal according to an input pre-stage clock signal and outputting a latch signal to the logic gate circuit; and the logic gate circuit is used for carrying out AND operation on the latch signal and the pre-stage clock signal and generating and outputting a clock control signal. According to the clock gating circuit, the state machine and the triple modular redundancy technology are applied to the clock gating circuit, so that the radiation resistance of the clock gating circuit is enhanced.

Description

technical field [0001] The present application relates to the technical field of chip design, in particular to a clock gating circuit and a method for implementing the clock gating circuit. Background technique [0002] With the development of chip design technology and manufacturing technology, large-scale system on a chip (SoC) has become the mainstream of chip development, rapidly occupying the market, and widely used in various fields, such as aviation and aerospace. [0003] In the field of aerospace, the SoC used in spacecraft, due to the complex radiation particles and rays in the space environment where the spacecraft is located, makes each device in the SoC vulnerable to single event effects. Among them, once the clock gating circuit, which is the upper control circuit of the chip clock structure, is affected by radiation particles and rays, it will generate single-event flips and single-event transient pulses, which will affect the downstream subsystems and registe...

Claims

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Application Information

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IPC IPC(8): H03K19/003H03K19/20G06F1/04
Inventor 陈默齐丹穆峻闫峥王雷张少真成丹
Owner SPACE STAR TECH CO LTD
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