Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate; a plurality of mutually separated gate structures, first conductive structures and side wall structures are formed on the substrate, a plurality of source-drain structures are formed in the substrate on two sides of the gate structures, the first conductive structures are positioned on the surfaces of the source-drain structures, the side wall structures are positioned between the gate structures and the side walls of the first conductive structures, and the first conductive structures are positioned on the surfaces of the source-drain structures. The side wall structure comprises an air gap and a sealing layer located on the top of the air gap, and the sealing layer is used for sealing the air gap. Therefore, through the air gap, the parasitic capacitance of the semiconductor structure is reduced, and the performance of the semiconductor structure is improved.

Description

technical field [0001] The present invention relates to the technical field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to adapt to the reduction of feature size, the channel length of MOSFET (Metal-Oxide-Semiconductor Field-EffectTransistor, MOSFET) is also shortened accordingly. [0003] With the decreasing length of the gate electrode, the most serious parasitic capacitance in the MOS transistor exists between the gate electrode and the contact-plug above the source-drain region, and reducing the parasitic capacitance is to improve the response of the small-sized MOS transistor The main methods of speed, power consumption, etc. [0004] However, the material of the spacer in the current MOS transistor structure is generally silicon n...

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Problems solved by technology

[0004] However, the material of the spacer in the current MOS transistor structure is generally silicon nitride, silicon oxide, etc., due to the large dielectric constant of materials such as silicon nitride, silicon oxide, etc., the contact between the gate electrode and the source and drain regions Large parasitic capacitance between plugs increases device delay and switching power consumption

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