Silicon-based liquid crystal panel and preparation method thereof

Abstract

The invention provides a silicon-based liquid crystal panel and a preparation method thereof. The preparation method comprises the steps that wafer-level packaging is carried out, a plurality of via holes penetrating through a silicon substrate are manufactured in each tube core area on a wafer substrate, a plurality of conductive interfaces are manufactured on the back face of the wafer substrate, the conductive interfaces correspond to the via holes in a one-to-one mode, and each conductive interface is electrically connected to an active circuit of the corresponding tube core area through the corresponding via hole; liquid crystal packaging: coating frame glue on each tube core area on the wafer substrate and a pixel circuit area surrounding an active circuit on the front surface of the wafer substrate, injecting liquid crystal into a liquid crystal space defined by the frame glue, bonding a glass substrate with a transparent conductive layer with the wafer substrate through the frame glue, cutting the wafer substrate and the glass substrate, and forming a liquid crystal layer on the wafer substrate; and obtaining a plurality of silicon-based liquid crystal panels. According to the technical scheme, the implementation of wafer-level chip scale packaging of the silicon-based liquid crystal panel is feasible, the cost is reduced, and the obtained silicon-based liquid crystal panel is small in total area and thin in thickness.

Description

technical field [0001] The present invention relates to the technical field of semiconductors, and in particular, to a liquid crystal on silicon (LCoS) panel and a preparation method thereof. Background technique [0002] Wafer Level Packaging (WLP) technology is an effective method for mass production of chips. Compared with pure integrated circuit chips, LCoS panels include not only integrated circuits, but also liquid crystal packaging structures. If a complete LCoS wafer-level packaging production line is built, not only the integrated circuit packaging parts, but also the liquid crystal packaging parts are required. Without such a complete production line, it can only be realized through equipment customization or transformation. The initial cost is very high, which is not conducive to the rapid advancement of industrialization. In addition, the production line for manufacturing liquid crystal-on-silicon panels needs to be composed of equipment from the semiconductor i...

AI Technical Summary

Problems solved by technology

Compared with pure integrated circuit chips, LCoS panels include not only integrated circuits, but also liquid crystal packaging structures. If a complete LCoS wafer-level packaging production line is built, not only the integrated circuit packaging part, but also the liquid crystal packaging part is required. At present, Without such a complete production line, it can only be realized through equipment customization or transformation. The initial cost is very high, which is not conducive to the rapid advancement of industrialization

In addition, the production line used to manufacture LCD-on-Silicon panels needs to be composed of equipment from the semiconductor industry, and its equipment cost is very high, and if the equipment cannot be operated at full capacity, its production cost is even higher

[0003] On the other hand, in order to keep the wafer cost as low as possible, more dies need to be filled in a standard wafer, resulting in a shrinking die design size

However, the small die size introduces new problems for subsequent module packaging

The die of the traditional LCOS panel is connected to the external circuit substrate through the conductive pads arranged on the front edge of the wafer substrate. Since the area where the leads can be set is reduced, the number of leads remains the same, which makes the conventional leads Wiring of bonded or thin film printed circuits is becoming increasingly difficult and time consuming

More importantly, this results in no increase in signal processing speed

Images