Semiconductor structure and manufacturing method thereof

A technology of semiconductor and oxide semiconductor, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, electric solid-state devices, etc. It can solve the problems of reducing high-frequency performance and increasing module size, and achieves the reduction of isolation effect, elimination of parasitic impedance, and compatibility The effect of package design scheme

Pending Publication Date: 2022-08-02
POWERLITE SEMICON (SHANGHAI) CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, this increases the size of the module
In addition, the electrical connections between capacitors and high-voltage devices often introduce significant parasitic impedances (primarily inductance and capacitance), degrading high-frequency performance

Method used

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  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof
  • Semiconductor structure and manufacturing method thereof

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Embodiment Construction

[0038] As shown in one or more embodiments, the principles of the invention will be described herein in the context of various illustrative three-dimensional (3D) structures and methods of fabricating such structures, including low voltage Bipolar devices and CMOS devices and / or circuits, It is provided in a stacked arrangement of high voltage DMOS devices and / or circuits. The 3D structure also includes backside integrated capacitors formed using semiconductor processing steps compatible with CMOS or DMOS processing flows that beneficially eliminate or at least reduce parasitic impedances (particularly inductances) to reduce switching node (SW) noise and voltage peaks, resulting in superior high frequency performance. It should be understood, however, that the present invention is not limited to the particular apparatus and / or methods illustrated and described herein. Rather, various modifications of the embodiments within the scope of the described inventions will appear to ...

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Abstract

A semiconductor structure includes at least one first chip including a semiconductor substrate and an active layer formed on an upper surface of the substrate, one or more lateral metal oxide semiconductor devices formed in the active layer of the first chip. The semiconductor structure further comprises at least one first integrated capacitor arranged on the back face of the semiconductor substrate of the first chip. The first integrated capacitor includes a first conductive layer electrically connected to the back surface of the substrate, an insulating layer formed on at least a portion of an upper surface of the first conductive layer, and a second conductive layer formed on at least a portion of an upper surface of the insulating layer.

Description

technical field [0001] The present invention relates generally to electrical, electronic and computer technology, and more particularly to improved Bipolar-CMOS-DMOS (BCD) structures. Background technique [0002] After the advent of the integrated circuit (IC) in the 1950s, several branches of the following basic technical routes appeared: Bipolar technology invented in the 1950s; complementary metal oxides invented in the 1960s Semiconductor (CMOS) devices; and Double Diffused Metal Oxide Semiconductor (DMOS) devices invented in the 1970s. However, starting in the early 1980s, it was sometimes necessary to use all three techniques simultaneously to meet higher voltage and faster switching speed requirements. As the name suggests, BCD technology combines the advantages of Bipolar, CMOS and DMOS technologies into the same IC package. Therefore, BCD technology has become a platform for a wide range of applications, such as power management integrated circuits (PMICs), analo...

Claims

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Application Information

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IPC IPC(8): H01L27/06H01L25/18H01L21/82H01L21/50H02M1/084H02M1/088H02M1/44H02M3/158
CPCH01L27/0694H01L25/18H01L21/82H01L25/50H02M1/084H02M1/088H02M1/44H02M3/158H01L25/16H01L25/0657H01L2225/06568H01L2225/06506H01L2225/0651H01L27/0629H01L27/0635H01L28/60H01L21/8221H01L24/29H01L24/32H01L24/48H01L2224/2919H01L2224/32145H01L2224/48105H01L2224/48227H01L2225/06544H01L2924/0665
Inventor 宋璐瑶樊航吴健时磊许曙明
Owner POWERLITE SEMICON (SHANGHAI) CO LTD
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