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Organosilicon precursor for interlayer medium film with low dielectric constant

A technology of low dielectric constant layer and dielectric thin film, which is applied in the direction of electric solid devices, coatings, circuits, etc., can solve the problems of combining mechanical and electrical properties, including thin films, etc., and achieve the effects of safe handling, easy acquisition, and easy formation

Inactive Publication Date: 2002-09-04
VERSUM MATERIALS US LLC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

One problem: it is difficult to include all the atoms or functionalities needed in the film in the same precursor molecule and have them present in the desired proportions to produce Si a o b C c h d or Si a o b C c h d f e Thin film, wherein the total atomic % of a+b+c+d+e=100%, and a=10-35%, b=1-66%, c=1-35%, d=0-60%, e = 0-25%
[0028] Despite the above developments, there are still no examples in the prior art of successfully combining the desired mechanical and electrical properties that are most important for incorporating low-k dielectric materials into integrated circuits

Method used

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  • Organosilicon precursor for interlayer medium film with low dielectric constant
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Examples

Experimental program
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Embodiment

[0084] All experiments were performed in a 200 mm DxZ chamber equipped with an Advance Energy 2000rf generator on an Applied Materials Precision-5000 system using a dopant-free TEOS process kit. The experimental method included the following basic steps: initial setting and stabilization of the gas flow, supply of RF energy to generate the plasma and induce deposition, and purge / evacuate the chamber before removing the wafer. Subsequently, after each deposition with in-place C 2 f 6 +O 2 The cleaning of the chamber is followed by a step of drying the chamber.

[0085] The dielectric constants of low resistivity p-type wafers (<0.02 ohm-cm) were determined using the Hg probe technique. Transmission infrared spectroscopy was performed on high resistivity wafers and all data were normalized based on film thickness. Thickness and refractive index were measured by reflectometer with 5 point average. Adhesion was measured with a tape pull test. Mechanical properties (such as Y...

Embodiment 7

[0105] A contemplated embodiment of the invention based on the use of dimethoxymethylsilane (DMOMS) as the organosilane precursor for a 200 mm silicon wafer substrate is shown in Table 8 below.

[0106] Room pressure (Torr)

[0107] It is expected that the k value will be in the range of 2.7-3.0, the Young's modulus is about 15 GPa, and the nanoindentation hardness is about 2 GPa.

[0108] A contemplated embodiment of the invention based on the use of phenoxydimethylsilane (PODMS) as the organosilane precursor for a 200 mm silicon wafer substrate is shown in Table 9 below.

[0109] Room pressure (Torr)

[0110] It is expected that the k value will be in the range of 2.7-3.0, the Young's modulus is about 15 GPa, and the nanoindentation hardness is about 2 GPa.

[0111] A contemplated embodiment of the invention based on the use of di-tert-butoxymethylsilane (DTBMS) as the organosilane precursor for a 200 mm silicon wafer substrate is shown in Table 10 below....

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Abstract

A method of forming a low -agent interior medium -layer medium thin film in a substrate. This method is to include metsellarium, metharial ether, hypopolin or metharial ether under the chemical gas phase of the substrate.Organic anterior compounds containing one or more active groups reacts to the anterior compound of the organic silicon compound to form a medium intervertebral film with a dielectric constant of 3.5 or lower.Film formed by the above method.

Description

technical field [0001] The invention relates to a method for forming a low dielectric constant interlayer dielectric thin film on a substrate by chemical vapor deposition (CVD) using a specific organosilicon precursor. Background technique [0002] The electronics industry utilizes dielectric materials as insulating layers between circuits and components of integrated circuits (ICs) and associated electronic devices. To increase the speed and memory capacity of microelectronic devices such as computer chips, the size of the circuits is decreasing. The size of microchips has been greatly reduced in the past decade, and the line width of about 1 micron has been reduced to 0.18 microns, which is expected to be reduced to 0.10-0.05 in the next 5-10 years. As the line size decreases, the requirements for preventing signal crossover (crosstalk) between chip elements become stricter. These requirements can be summarized by the formula RC, where R is the resi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): B05D7/24C23C16/40H01L21/312H01L21/316H01L21/768H01L23/522
CPCB05D1/60C09D183/06C23C16/401H01L21/02126H01L21/02131H01L21/02216H01L21/02274H01L21/02211
Inventor J·L·文森特M·L·奥内尔小H·P·威瑟斯S·E·贝克R·N·弗蒂斯
Owner VERSUM MATERIALS US LLC
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