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A capacitor and a transistor and the producing method

A manufacturing method and transistor technology, which are applied to transistors and uniaxial strain transistors and their manufacturing, capacitors and transistors and their manufacturing fields, can solve the problems of CMOS process technology being difficult to realize and difficult to integrate, and achieve high-speed performance improvement, The effect of increasing the drive current

Inactive Publication Date: 2004-04-28
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, CMOS process technology combining NMOS transistors with biaxial tensile strained silicon channels and PMOS transistors with biaxial compressive strained silicon germanium channels is difficult to implement
There are many strained layer fabrication methods used in the fabrication of transistors, such as the thick buffer layer mentioned above or other complex multi-layer structures, which are not easy to integrate into the traditional CMOS process

Method used

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  • A capacitor and a transistor and the producing method
  • A capacitor and a transistor and the producing method
  • A capacitor and a transistor and the producing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0043] Embodiment 1: Utilize the capacitor that the insulating plug of different permittivity constitutes and manufacturing method thereof:

[0044] Please also refer to Figure 1A , Figure 1B , figure 2 and image 3 , Figure 1B With figure 2 The I-I profile correlates, image 3 it's for Figure 1B The equivalent circuit diagram of a capacitor.

[0045] As shown in the figure, the capacitor provided by the present invention using insulating plugs with different dielectric constants is integrated with the shallow trench isolation structure. First, the low-permittivity insulating plug 112 and the high-permittivity insulating plug 114 are disposed in the substrate 100, wherein the low-permittivity insulating plug 112 at least defines a capacitor region 106, and the high-permittivity insulating plug 114 is located in the capacitive region 106 and separates the capacitive region 106 into a first electrode region 108a and a second electrode region 108b. The high dielectr...

Embodiment 2

[0056] Embodiment 2: A transistor made of insulating plugs with different dielectric constants and its manufacturing method

[0057] Vertical NMOS Transistor

[0058] Please refer to Figure 4A and Figure 4B , which is a schematic structural diagram of a vertical NMOS transistor.

[0059] As shown in the figure, the transistor provided by the present invention using insulating plugs with different dielectric constants is integrated with the shallow trench isolation structure. First, the low dielectric constant insulating plug 412 and the high dielectric constant insulating plug 414 are disposed in the substrate 400, wherein the low dielectric constant insulating plug 412 defines an active area AA, and the high dielectric constant insulating plug 414 It is located in the active area AA and separates the active area AA into a gate area 408b and a source / drain area 408a. The high dielectric constant insulating plug 414 serves as the gate insulating layer of the transistor. ...

Embodiment 3

[0090] Embodiment 3: A strained transistor and its manufacturing method formed by using an insulating plug with a thermal expansion coefficient different from that of the substrate.

[0091] 1. Transistors with biaxial tensile strain (tensile stress)

[0092] Please refer to Figure 6 and Figure 7 ,in Figure 7 for Figure 6 Section view of VII-VII. Firstly, a substrate 600 is provided, such as a single crystal silicon substrate, and a trench 602 is formed in the substrate 600, and the trench 602 defines an active area AA. Next, an insulating material with a thermal expansion coefficient greater than that of the substrate 600 is filled into the trench 602 to form an insulating plug 612 . The optional insulating material can be zirconia (ZrO2 ), block talc (MgOSiO 2 ), alumina (Al 2 o 3 ), silicon carbide (SiC), silicon nitride (SiN) or other materials with similar properties, please refer to Table 1 for their properties.

[0093] Next, a transistor T is formed in the...

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Abstract

This invention discloses condensers and transistors composed of plugs in different dielectric constants and method, among which, plugs of the low dielectric constant is for isolating elements and high for coupling, eg, a condenser dielectric layer or grating insulation layer. This invention also provides a twin-shaft and single-shaft strain transistor made up of plugs with the thermal expansion coefficient different from the base and its processing method, if it's larger, the active zone can form twin-shaft tension strain channel transistor if it's smaller, compression strain transistor is formed, if a side forms plugs with large thermal expansion coefficient then the opposite forms plugs with smaller coefficient, the active part forms single-shaft strain transistors.

Description

technical field [0001] The present invention relates to an electronic component and its manufacturing method, especially a capacitor and transistor made of insulating plugs with different dielectric constants and its manufacturing method. A biaxially strained transistor and a uniaxially strained transistor composed of an insulating plug and a manufacturing method thereof. Background technique [0002] Shallow trench isolation (STI) is the most commonly used isolation element in CMOS processes below 0.25 microns. However, as the size of the STI structure continues to shrink below 0.15 microns, the electric field from the bias voltage of the adjacent source / drain junction region will easily penetrate the channel region. Therefore, negative effects such as Vt disturbance may be caused. In order to eliminate the field penetration effect, a metal-shielded shallow trench isolation structure has been proposed, which is filled with a layer of conductive material, such as doped pol...

Claims

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Application Information

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IPC IPC(8): H01L21/70
Inventor 季明华
Owner TAIWAN SEMICON MFG CO LTD