Planar salient point type technique for packaging intergrate circuit or discrete component

Abstract

The invention includes following technical steps: pasting dry film layer on both sides of metal base plate; removing part of dry film layer for preparing basic island and pins to be formed; plating metal layer at place, where basic island and pins are to be formed, on both sides, then removing remanent dry film layer on front face; carrying out half etching so as to form concave half etched area including basic island and pins, and removing remanent dry film layer on back face; embedding chip on metal layer of basic island on front face, making metal wire, enveloping plastic package, printing at front face; etching remanent partial metal at half etching area, and pasting rubber film onto plastic package and incising. Features are: good weldability, low cost, high adaptability, flexible to arrange multiple chips, and avoiding infiltration of material of plastic package.

Description

Technical field: [0001] The invention relates to a planar bump packaging process for integrated circuits or discrete components. It belongs to the technical field of packaging of integrated circuits or discrete components. Background technique: [0002] The traditional ultra-thin leadless packaging process for integrated circuits or discrete components, the package type is a four-sided leadless surface mount package, and the array assembly is cut into a single unit. Its substrate type is lead frame type. It mainly has the following deficiencies: [0003] 1. Lead frame: The lead frame is made by penetrating etching. [0004] 2. Chemical adhesive film: because of the penetrating etching method, it will cause overflow during the encapsulation process. [0005] 3. Pollution: Because of the use of chemical tape, the adhesive of the film is easily vaporized due to high temperature in various high-temperature processes, and indirectly pollutes or covers the surface of the chip'...

AI Technical Summary

Problems solved by technology

[0004] 2. Chemical adhesive film: due to the penetrating etching method, it will cause overflow during the encapsulation process

[0005] 3. Pollution: Because of the use of chemical tape, the adhesive of the film is easily vaporized due to high temperature in various high-temperature processes, and indirectly pollutes or covers the surface of the chip's pressing area and the wiring area, often causing wiring Instability of ability

[0009] B. Because of the fear of a large amount of rework after flashing, I dare not use a large encapsulation pressure. As a result, the plastic encapsulation compound is loose, the water absorption rate is increased, and the density is reduced, which seriously increases the production cost and yield cost;

[0010] C. The part of the bottom output pin of the four-sided surface mount type package is at the same height as the surface of the plastic package or even recessed. During the surface mount process, there will be a problem of poor contact due to poor coplanarity of the soles of the feet; at the same time, due to The outer pin is sunken in the plane of the plastic package, air will remain in the sunken during surface mount operation, and the contact will be broken after the high-temperature air expands;

[0011] D. Because the output pin and the plastic package are on the same plane or even recessed, it is easy to cause the solder paste on the surface of the protruding pin to connect to ea

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