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Compositions and methods for chemical mechanical polishing thin films and dielectric materials

A technology of dielectric materials and compositions, applied in the field of CMP compositions, which can solve the problems of low productivity, poor removal of lower film, unacceptable selectivity of semiconductor materials and insulating materials, etc.

Inactive Publication Date: 2006-09-27
ROHM & HAAS ELECTRONICS MATERIALS CMP HLDG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] While current slurry compositions are suitable for limited purposes, their polishing rates and corresponding selectivities for semiconducting and insulating materials used in wafer fabrication are unacceptable
In addition, known polishing slurries have poor film removal properties for underlying films, or detrimental corrosion of films, resulting in low productivity

Method used

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  • Compositions and methods for chemical mechanical polishing thin films and dielectric materials
  • Compositions and methods for chemical mechanical polishing thin films and dielectric materials
  • Compositions and methods for chemical mechanical polishing thin films and dielectric materials

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0036] This test measures the selectivity of the compositions of the present invention for certain conductive, semiconducting and dielectric materials. Specifically, fumed silica processed only at acidic pH was tested for its selectivity to silicon and silicon nitride relative to PTEOS and BPSG. Using Strasbaugh 6EC polisher with IC1010 TM Polyurethane polishing pads (Rohm and Haas Electronic Materials CMP Co., Ltd.) were used to planarize the samples under the following conditions: downward force of 4 psi (27.58 kPa), polishing solution flow rate of 150 cm3 / min, and platen rotation speed of 93 RPM , the bracket rotation speed is 87RPM. Adjust the pH of the polishing solution to 8 using nitric acid or ammonium hydroxide. All solutions contained a balance of deionized water.

[0037] Table 1

[0038]

[0039] As shown in Table 1 above, the addition of fumed silica increased the selectivity of the composition. Specifically, the addition of low pH treated fumed silica to ...

Embodiment 2

[0041] This test measures the effect of different concentrations of components in the compositions of the present invention on the selectivity of certain conductive, semiconducting and dielectric materials. Specifically, the effect of fumed silica treated at acidic pH only, and various concentrations of alcohol amines and zwitterionic compounds on the selectivity to silicon nitride over BPSG was tested. Using an Applied Materials Mirra® polisher with a WP300 TM Polyurethane polishing pads (Rohm and Haas Electronic Materials CMP Co., Ltd.) were used to planarize the samples under the following conditions: downward force of 4 psi (27.58 kPa), polishing solution flow rate of 1502 cm3 / min, and platen rotation speed of 93 RPM , the bracket rotation speed is 87RPM. Adjust the pH of the polishing solution to 8 using nitric acid or ammonium hydroxide. Some test solutions included optional inorganic additives. All solutions contained a balance of deionized water.

[0042]

[004...

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Abstract

The present invention provides an aqueous composition useful for polishing conducting, semi-conducting and dielectric materials on a semiconductor wafer comprising by weight percent 0.01 to 5 zwitterionic compound, 0.01 to 5 cationic compound, 0.5 to 10 abrasive, 0 to 5 inorganic acids and salts thereof, and balance water, wherein the abrasive is filmed silica that has only been exposed to an acidic pH. The composition and method provide unexpected selectivity for removing conductive and semi-conductive layers relative to dielectric layers.

Description

technical field [0001] The present invention relates to chemical mechanical planarization (CMP) of semiconductor wafer materials, and more particularly, the present invention relates to the use of high selectivity to interlayer dielectric materials such as silicon nitride and various interconnect layers, and semiconductor CMP compositions and methods for polishing thin films used in integrated circuit fabrication. Background technique [0002] Semiconductor wafers typically include a substrate, such as a silicon wafer or a gallium arsenide wafer, on which a large number of electronic devices are formed. Electronic devices such as transistors and capacitors are chemically and physically connected to the substrate through patterned regions in the substrate and layers on the substrate. These devices and layers are separated by interlevel dielectrics (ILDs) consisting primarily of some form of silicon oxide (SiO 2 ) material formation. These devices are interconnected to form...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): C09K3/14H01L21/302B24B37/00H01L21/304
CPCC09G1/02H01L21/31053H01L21/3212C09K3/1463H01L21/30625B42F7/02B42F5/00B42F7/14B42F3/003B42F13/00B42P2201/02
Inventor B·L·米勒
Owner ROHM & HAAS ELECTRONICS MATERIALS CMP HLDG INC