Semiconductor flip-chip package and method for the fabrication thereof

Abstract

A flip-chip device and process for fabricating the device employs a multilayer encapsulant that includes a first portion encapsulant having a coefficient of thermal expansion of at most 30 ppm / .degree. C. and an elastic modulus of 2-20 GPa and a second portion comprising a polymer flux having a coefficient of thermal expansion that may exceed 30 ppm / .degree. C.

Description

[0001] This application is a divisional of applicationi Ser. No. 09 / 517,839 filed on Mar. 2, 2000, which is a continuation-in-part of application Ser. Nos. 09 / 120,172 and 09 / 137,971, filed Jul. 21, 1998 and Aug. 21, 1998, respectively, and which are incorporated herein in their entiretiesFIELD OF THE INVENTION[0003] This invention relates generally to semiconductor chips electrically and mechanically connected to a substrate, particularly to flip-chip configurations.BACKGROUND OF THE INVENTION[0004] Flip-chip technology is well known in the art. FIG. 1 illustrates a semi-conductor chip having solder bumps formed on the active side of the semi-conductor chip 100 that is inverted and bonded to a substrate 101 through the solder joints 102 by reflowing solder to wet metallized pads 106. Structural solder joints 102 are formed from solder bumps situated between the semi-conductor chip and the substrate to form the mechanical and electrical connections between the chip and substrate. A n...

AI Technical Summary

Benefits of technology

[0020] The present invention is based in part on the discovery of employing a multilayer underfill encapsulant that comprises at least first and second portions or layers, at least one of which comprises a polymer flux. The use of two or more layers allows the layers to have different physical properties as measured by their thermal expansion coefficients and elastic moduli. Electrical components such as flip-chips employing the inventive layers have superior structural integrity. Since the polymer flux generally has a coefficient of expansion exceeding 30 ppm per degree C, this multilayer approach allows the use of polymer fluxes without adversely affecting reliability at the final assembly.

[0060] The semiconductor chip package structures of the present invention provide, among other advantages, simple chip placement followed by reflow without labor intensive underfill steps; a solder bumped chip or substrate with an encapsulant pre-attached, with the encapsulant performing a mechanical function and the solder performing an electrical function; a low-cost method for applying the solder bumps to a flip chip or flip chip substrate by creating holes in a pre-coated encapsulant; and a pre-coated chip encapsulant of two or more layers, with each layer performing a distinct function.

Problems solved by technology

One obstacle to flip-chip technology when applied to polymer printed circuit substrates (i.e., circuit boards) is the unacceptably poor reliability of the solder joints due to the mismatch of the coefficients of thermal expansion of the (i) chip, which typically has a coefficient of thermal expansion of about 3 ppm / .degree. C., (ii) the polymer substrate, e.g. epoxy-glass, which has a coefficient of thermal expansion of about 16 to 26 ppm / .degree. C., and (iii) the solder joint which has a coefficient of thermal expansion of about 25 ppm / .degree. C. As shown in FIGS. 2 and 3, as the flip chip 100 and printed circuit substrate 101 undergo thermal excursions, the substrate expands and contracts at a greater rate than does the ch

oints. As the chip and substrate are thermally cycled through normal use, this flexing and bending weakens the solder joints which causes them to quickl

The underfilling process, however, makes the assembly of encapsulated flip-chip printed wire boards a time consuming, labor intensive and expensive process with a number of uncertainties.

After reflow, due to the close proximity of the chip to the substrate, removing any remaining flux residues from under the chip is such a difficult operation that it is generally not done.

Yet these residues are known to reduce the reliability and integrity of the subsequent underfill encapsulant.

Typically, the filler to resin volume ratio is in the range of 50 to 65%, but this high filler concentration tends to make the resin mixture very viscous, which slows the rate at which it can flow into the gap between chip and substrate during underfilling.

Consequently, the slow underfill process is expensive to perform in a large throughput manufacturing environment.

1. The reflowing of the solder bump and subsequent underfilling and curing of the encapsulant is an inefficient multi-step process.

2. Underfilling a flip-chip assembly is time consuming because the viscous resin material must flow through the tiny gap between the chip and the substrate.

3. Air bubbles can be trapped in the underfill encapsulant during the underfilling process and these bubbles later become sites for solder joint failure.

4. The flux residues remaining in the gap reduce the adhesive and cohesive strengths of the underfill encapsulating adhesive, thereby adversely affecting the reliability of the assembly.

5. For larger chips, the limiting effect of capillary action becomes more critical and makes the underfilling procedure more time consuming and more susceptible to void formation and to the separation of the polymer from the fillers during underfilling.

However, the chief limitation of this technique is that in order for the molten solder to readily wet the substrate metallized pads and to allow the solder, through surface tension, to self-align the chip to the substrate metallized pads, the polymer flux encapsulant must have a very low viscosity during the reflow step.

However, the viscosity of the material is severely increased by the presence of inorganic fillers above a concentration of more that a few percent.

This approach fails to produce an underfill encapsulant material that can serve as both the flux and the encapsulant with the required low coefficient of thermal expansion and high modulus needed for optimum reliability.

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