Fabrication method of semiconductor integrated circuit device

Abstract

To permit electrical testing of a semiconductor integrated circuit device having test pads disposed at narrow pitches probes in a pyramid or trapezoidal pyramid form are formed from metal films formed by stacking a rhodium film and a nickel film successively. Via through-holes are formed in a polyimide film between interconnects and the metal films, and the interconnects are electrically connected to the metal films. A plane pattern of one of the metal films equipped with one probe and through-hole is obtained by turning a plane pattern of the other metal film equipped with the other probe and through-hole through a predetermined angle.

Description

CROSS-REFERENCE TO RELATED APPLICATION [0001] The present application claims priority from Japanese patent application No. 2003-372323, filed on Oct. 31, 2003, the content of which is hereby incorporated by reference into this application. BACKGROUND OF THE INVENTION [0002] The present invention relates in general to technology for the manufacture of a semiconductor integrated circuit device, and, more particularly, to a technique that is effective when applied to electrical testing of a semiconductor integrated circuit device having a plurality of electrode pads disposed at narrow pitches. [0003] For example, in the burn-in test of a semiconductor device having a protruding electrode, using a semiconductor device testing apparatus having a plurality of pyramid-shaped contact terminals protruding toward the semiconductor device, at least one contact terminal is brought into contact, at the ridge line or slope thereof, with one of the protruding electrodes, thereby bringing the semic...

AI Technical Summary

Benefits of technology

"The patent text discusses the challenges of testing semiconductor integrated circuit devices, particularly with regards to the increasing number of test pads and the narrowing of the pitch between them. The text describes a new technique using a prober with cantilever type probes that can make electrical contact with bump electrodes on the chip. The technique allows for efficient testing without the need for additional test pads and reduces the risk of short-circuiting or damage to the chip. The text also addresses the issue of shaving off test pad material during probing, which can affect the adhesive force of the bonding wire and lead to a rise in production cost. The invention aims to provide a solution for reliable and efficient testing of semiconductor integrated circuit devices."

Problems solved by technology

With narrowing of the pitch of the test pads, it becomes difficult to locate probes so that they come into contact with the test pads when a prober having cantilever type probes is used for the probe testing.

Wiping of the probes will not only break the natural oxide film formed over the surface of each test pad, but also forms a dent on the surface of the test pad.

This leads to a problem in that the adhesive force of a bonding wire connected to the test pad in the later step is inevitably lowered.

There is also a fear that, as the area of the test pad decreases, the tip portion of the probe deviates from the test pad and a short-circuit occurs between the two test pads.

The shavings adhere to the tip portion of the probe one after another by the repetition of probing, which finally disturbs the electrical connection between the probe and the test pad.

The inevitable addition of this cleaning step prolongs the probe testing step, which also prolongs the fabrication time of the semiconductor integrated circuit device, resulting in a rise in the production cost of the semiconductor integrated circuit device.

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