Method of direct plating of copper on a ruthenium alloy

Abstract

A method is disclosed for depositing a copper seed layer onto a substrate surface, generally onto a barrier layer that is an alloy of a group VIII metal and a refractory metal. In one aspect, the alloy consists of at least 50% ruthenium and the balance a copper diffusion barrier material. A copper layer is electroplated on the alloy directly. In one aspect, the surface of the barrier layer is conditioned prior to plating to improve adhesion and reduce the critical current density for plating on the barrier layer. The conditioning may include cathodic pre-treatment or a plasma pre-treatment in a hydrogen or hydrogen / helium mixture. In one aspect, the substrate surface is immersed in an acidic plating bath and a nucleation waveform is applied to form a seed layer. In another aspect, the substrate is immersed in a neutral or alkaline copper solution that includes complexed copper ions.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS [0001] This application is a continuation-in-part of co-pending U.S. patent application Ser. No. 11 / 255,368 [APPM 8241.P01], filed Oct. 21, 2005, which claims benefit of U.S. Provisional Patent Application Ser. No. 60 / 621,173 [APPM 9762L], filed Oct. 21, 2004. This application is a continuation-in-part of co-pending U.S. patent application Ser. No. 11 / 007,857 [APPM 9200], filed Dec. 9, 2004, which claims benefit of U.S. Provisional Patent Application Ser. No. 60 / 579,129, filed Jun. 10, 2004. This application is also a continuation-in-part of co-pending U.S. patent application Ser. No. 11 / 012,965 [APPM 9201], filed Dec. 15, 2004, which claims benefit of U.S. Provisional Patent Application Ser. No. 60 / 579,129, filed Jun. 10, 2004, and U.S. Provisional Patent Application Ser. No. 60 / 621,215, filed Oct. 21, 2004. This application is also a continuation-in-part of co-pending U.S. patent application Ser. No. 10 / 616,097 [APPM 8241], filed Jul. 8, 200...

AI Technical Summary

Problems solved by technology

However, as interconnect sizes decrease and aspect ratios of device features increase, void-free filling of interconnect features via conventional metallization techniques becomes increasingly difficult.

As a result thereof, conventional plating processes will likely be inadequate to support the demands of future interconnect technologies.

However, it is extremely difficult to have adequate seed step coverage with PVD techniques, as discontinuous islands of copper are often obtained close to the feature bottom in high aspect ratio features with PVD techniques.

For CVD processes, copper purity is generally questionable due to difficult complete precursor-ligand removal.

ALD techniques, though capable of giving generally conformal deposition with good adhesion to the barrier layer, suffer from very low deposition rates for depositing a continuous copper film on the sidewalls of adequate thickness to serve as a seed layer.

However, these techniques have suffered from several problems, such as adhesion failure between the copper seed layer and the barrier layer, as well as the added complexity of a complete electroless deposition system and the associated difficulties of process control.

A stress migration failure is a highly localized delamination failure that takes place in an electronic device during the thermal cycling associated with normal usage.

This thermal cycling may create voids that coalesce over time into points of failure.

Although each of these tests are somewhat qualitative, it is known in the art that deposited films that pass these tests reliably will generally not show adhesion-related problems later, such as pull-out during CMP or stress migration failures during electronic device use.

A deposited film with poor adhesion to the underlying surface will routinely fail the pull test and may even spontaneously spall off the underlying surface.

A deposited film with marginal adhesion may pass the pull test but may fail the scribe test.

Another instance of marginal film adhesion is when the film passes both the pull and scribe tests, but not reliably.

For example, the deposited film may only fail the scribe test at certain locations on the substrate, or it may only fail on intermittent substrates, or both.

Because other methods of depositing a copper seed layer onto a barrier layer are problematic, direct electroplating of a copper layer onto barrier materials has been considered.

Direct electroplating onto conventional barrier materials, such as tantalum or tantalum nitride, is difficult, since these traditional barrier materials generally have insulating native oxides across the surface.

Pre-plating treatments, such as thermal anneal in a reducing gas and cathodic reduction, have been attempted on tantalum-based barrier layers but have not improved adhesion.

Thus, adhesion of direct-electroplated copper layers is still poor on tantalum-based barrier layers that have undergone pre-plating treatments to reduce tantalum oxide present on the surface of the barrier layer.

This is because fresh tantalum surfaces are re-passivated so quickly in an aqueous electrolyte, i.e., on the order of 1 second, that adherent copper deposits cannot be obtained.

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