Etching Liquid for Controlling Silicon Wafer Surface Shape

Abstract

A method for manufacturing a silicon wafer includes a planarizing process 13 for polishing or lapping the upperside and lowerside surfaces of a thin disk-shaped silicon wafer obtained by slicing a silicon single crystal ingot, an etching process for dipping the silicon wafer into the etching liquid wherein silica powder is dispersed uniformly in an alkali aqueous solution, thereby etching the upperside and lowerside surfaces of the silicon wafer, and a both-side simultaneous polishing process 16 for polishing the upperside and lowerside surfaces of the etched silicon wafer simultaneously or a one-side polishing process for polishing the upperside and lowerside surfaces of the etched silicon wafer one after another, in this order.

Description

CROSS-REFERENCES TO RELATED APPLICTION [0001] This application claims priority of Japanese Application No. 2005-0022764 filed Jan. 31, 2005, the entire disclosure of whis is hereby incorporated by reference. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The present invention relates to an etching liquid for controlling a silicon wafer surface shape and a method for manufacturing a silicon wafer using the same for reducing loads of a both-side simultaneous polishing process, and attaining both a high flatness degree and the reduction of surface roughness. [0004] 2. Description of the Related Art [0005] Generally, the manufacturing processes of a semiconductor silicon wafer include processes of chamfering, mechanical polishing (lapping), etching, mirror grinding (polishing) and cleaning on a wafer that is cut and sliced from a silicon single crystal ingot pulled up, and the wafer is manufactured into a wafer having a highly precise flatness degree. A silicon wafe...

AI Technical Summary

Benefits of technology

The present invention provides an etching liquid for controlling the surface shape of a silicon wafer that can reduce polishing removal amounts in both the two-side simultaneous polishing process and the one-side polishing process, and attain both a high flatness degree and a reduction of surface roughness. The etching liquid contains silica powder dispersed uniformly in an alkali aqueous solution and can control the surface roughness and texture size of the wafer before polishing. The method for manufacturing a silicon wafer involves a planarizing process, an etching process, and a one-side polishing process. The etching process using the etching liquid can reduce the polishing removal amounts in the upper and lower surfaces of the wafer and maintain a high flatness degree at the completion of the planarizing process.

Problems solved by technology

The work-affected layer induces crystal defects such as a slip dislocation and the like in the device manufacturing processes, and decreases the mechanical strength of the wafer, and causes adverse effects on the electrical characteristics thereof, and accordingly such defects must be removed completely.

However, in this acid etching, although the work-affected layer can be etched while improving the surface roughness of a silicon wafer, as the acid etching progresses, the outer circumferential portion of the wafer becomes dull, and the flatness degree as micro shape precision obtained by lapping is deteriorated, which causes mm-order concaves and convexes called swells or peels on the etched surface.

Further, the cost of the chemical liquid is high, and it is difficult to control and maintain the composition of the etching liquid, which has been a problem in the prior art.

However, in the alkali etching, although the work-affected layer can be etched while maintaining the flatness degree of a silicon wafer, there occur facets whose partial depth is several pm, and whose size is several to several ten μm (hereinafter, referred to as facets) that deteriorates the wafer surface roughness, which has been another problem in the prior art.

However, in the upperside and lowerside surfaces of the silicon wafer after the etching process, the wafer flatness degree obtained at completion of the planarizing process is not maintained.

Furthermore, a desired wafer surface roughness is not obtained yet, and accordingly, in order to improve the wafer flatness degree and the wafer surface roughness, it is necessary to move or remove large amounts of grinding residue in the both-side simultaneous polishing process and the one-side polishing process.

As a result, this creates additional time and energy loads on the both-side simultaneous polishing process and the one-side polishing process.

Images