Semiconductor device and manufacturing method for the same

a semiconductor and manufacturing method technology, applied in semiconductor devices, semiconductor/solid-state device details, electrical devices, etc., can solve the problems of inability to reduce, easy to fracture wafers or semiconductor chips, and inability to reduce, so as to prevent cracks and breakage, and low elasticity

Inactive Publication Date: 2008-01-17
ROHM CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0011] Therefore, it is an object of the present invention to solve the above mentioned technical problems and provide a semiconductor device maintained in a reduced thickness of the semiconductor device and reduced in cracks or breakages caused in the semiconductor device.
[0053] According to the present invention, because the resin film formed on the other surface is low in elasticity, it is prevented from occurring cracks and breakages in the semiconductor device. Meanwhile, even where the semiconductor chip is mounted in a state foreign matter is put on the backside of the semiconductor chip, the concave-convex caused by the foreign matter can be somewhat relaxed, to prevent against cracks and breakage in the semiconductor chips or substrate. Incidentally, because the resin film formed on the other surface is smaller than the film thickness of the resin film formed on the one surface, the semiconductor surface can be suppressed from increasing the thickness to a required extent or more. Meanwhile, because the resin layer is provided not only on the one surface but also on the other surface, force acts to warp the wafer in opposite directions. Thus, there is less occurrence of warping than the case of in the resin film is formed on one side of the wafer, which is caused by a difference in thermal expansion / contraction between the semiconductor substrate and the resin film. Meanwhile, due to less wafer warp, semiconductor chips are to be cut out of a wafer in a flat state of the wafer. Thus, semiconductor chips can be cut out of the wafer evenly at both the center and the peripheral regions thereof.

Problems solved by technology

However, as for the wafer thinned by back grinding, fracture is ready to occur in the wafer or semiconductor chips upon handling by a transfer robot, etc. in the subsequent process, such as cutting process to cut the wafer into individual semiconductor chips, or mount process to mount the cut semiconductor chips onto the lead frame.
Particularly, nowadays, because the wafer has an increasing its diameter, fracture occurs more readily in the wafer thinned by back grinding.
Consequently, despite fracture is reduced in back grinding or during handling, the following problem cannot be lessened.
Such breakages and cracks possibly lead to conspicuous lowering in semiconductor device reliability.
Meanwhile, during mounting the cut semiconductor chips onto a wiring board, etc., in case there is a foreign matter on the backside of the semiconductor substrate, after mounted on the wiring board, stress is easily applied through the foreign matter to the substrate backside where the semiconductor chip is exposed thus readily causing cracks and breakages in the semiconductor chip.
Meanwhile, an impact is applied by such an impact to the semiconductor device upon sucking by a transport suction collet of the mounter during mounting the semiconductor device onto a wiring board, etc., thus raising a fear to cause cracks and breakages in the semiconductor device.
Meanwhile, there is a possibility that the wafer warps resulting from a difference in thermal expansion / contraction coefficient between the semiconductor substrate and the resin.

Method used

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  • Semiconductor device and manufacturing method for the same
  • Semiconductor device and manufacturing method for the same
  • Semiconductor device and manufacturing method for the same

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embodiment 1

[0059]FIG. 1 is an illustrative wafer sectional view showing, in process order, a method for manufacturing a semiconductor device according to an embodiment of the invention. In the figure, a semiconductor substrate 1 (also referred to as “wafer 1”), processed by various device-forming and wiring processes and so on, is covered with a protection film (passivation film) (not shown) formed by a nitride film or the like in the area except for terminal regions (not shown) on a surface 1a as a surface on an active surface layer side. In the terminal regions, there are formed pads for electric connections of the circuits formed on the wafer to the external.

[0060] On the pads, projection electrodes 2 (posts) are formed in plurality, for example, of copper (Cu), gold (Au), solder, etc. by electroplating, for example, as shown in FIG. 1A. The projection electrode 2 has a height of approximately 50 μm with respect to the protection film surface, assuming a columnar form such as a circular cy...

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Abstract

A semiconductor device has a semiconductor substrate having first and second surface, a first resin film formed on the first surface of the semiconductor substrate and a second resin film formed on the second surface of the semiconductor substrate. A projection electrode or an interconnection is formed on the first surface of the semiconductor substrate, the second resin film is made of low elastic resin which is capable of absorbing an impact applied to the second surface of the semiconductor substrate and the second resin film is thinner than the semiconductor substrate.

Description

[0001] This application is a Division of application Ser. No. 11 / 004,291, filed Dec. 3, 2004, which application is incorporated herein by reference. [0002] The present invention claims foreign priority to Japanese patent application no. 2003-406703, filed on Dec. 5, 2003, the contents of which is incorporated herein by reference.BACKGROUND OF THE INVENTION [0003] 1. Field of the Invention [0004] This invention relates to a small and thin semiconductor device which is useful for use in a portable device, such as a cellular phone or an IC card. [0005] 2. Description of the Related Art [0006] Conventionally, along with the reduction in apparatus size and thickness, thinning-at-back process for reducing wafer thickness is carried out to reduce the thickness of a semiconductor chip. The reduction of the semiconductor chip is performed by a grinding process to mechanically grind at the back of a semiconductor substrate having semiconductor elements, interconnects, etc. formed on a surface...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): H01L21/00H01L21/30H01L21/304H01L23/29H01L21/312H01L21/56H01L21/60H01L23/00H01L23/12H01L23/28H01L23/31H01L23/38
CPCH01L21/312H01L21/56H01L21/561H01L23/3114H01L23/562H01L2924/01079H01L2223/5448H01L2224/16H01L2224/274H01L2924/01078H01L2221/6834H01L2924/00014H01L2924/00011H01L21/02282H01L21/02118H01L21/022H01L2224/0401H01L21/30H01L23/28
Inventor SHIBATA, KAZUTAKA
Owner ROHM CO LTD
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