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Thin film transistor and multilayer film structure and manufacturing method of same

a technology of thin film transistor and multilayer film, which is applied in the direction of transistors, optics, instruments, etc., can solve the problems of high manufacturing cost and high investment cost, and achieve the effect of reducing the cost of manufacturing such devices, facilitating formation, and reducing investment costs

Inactive Publication Date: 2006-05-02
VIDEOCON GLOBAL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

"The present invention aims to improve the manufacturing process for a multilayer film structure of a thin film transistor or the like. It achieves this by reducing current leakage between electrodes by forming an offset region in the manufactured multilayer film structure. The invention also provides a multilayer film structure where offset lengths of formed offset regions are uniform. The invention can be applied to different types of thin film transistors, such as top gate, bottom gate, laminated, or contact or non-contact types. The use of printing-and-plating techniques simplifies the process and reduces costs. Overall, the invention simplifies the manufacturing process and reduces costs for thin film transistors."

Problems solved by technology

However, since the conventional 7 PEP structure requires a number of steps and the process itself becomes complex, manufacturing costs become high.
In other words, investments are costly because of very high prices of forming the films using the complex PEP processes.

Method used

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  • Thin film transistor and multilayer film structure and manufacturing method of same
  • Thin film transistor and multilayer film structure and manufacturing method of same
  • Thin film transistor and multilayer film structure and manufacturing method of same

Examples

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embodiment 1

[0025]Each of FIGS. 1(a) and 1(b) is a view showing a thin film transistor (TFT) structure of the present invention, by taking an example of a TFT of a top gate type. Specifically, FIG. 1(a) shows a state of the TFT when seen from above, which is manufactured in a shortened process by a later-described manufacturing method; and FIG. 1(b) shows an A—A section of FIG. 1(a).

[0026]As shown in FIG. 1(b), the TFT of the embodiment comprises a light shielding film (light shield) 12 formed on an insulating substrate 11 made of no-alkali glass, quartz or the like, and an insulating film 13 formed as an undercoated layer to cover the upper portion thereof, the undercoated layer being made of an oxidized silicon nitride film SiOxNy or the like. Preferably, the light shielding film 12 is formed by printing-and-plating copper (CU). On the insulating film 13, source and drain electrodes 14 and 15 are formed. Preferably, the source and drain electrodes are formed by printing-and-plating cobalt (Co...

second embodiment

[0040]The description above illustrates an embodiment of the present invention in a TFT of a top gate type. Next, description will be made for the present invention in a TFT of a bottom gate type and another multilayer film structure, to which the present invention is applied.

[0041]Each of FIGS. 3(a) and 3(b) is a view illustrating a constitution of this second embodiment. FIG. 3(a) shows the state where the gate electrode 31 and the data line 32 cross to each other. FIG. 3(b) shows a B—B section of FIG. 3(a). In the multilayer film structure of the embodiment, as shown in FIG. 3(b), an a-Si film 34 and a gate insulating film 35 are formed on a gate electrode 31, and a data line 32 is formed on the gate insulating film 35. If an end surface of the data line 32 coincides with an etching end surface of the a-Si film 34 or the gate insulating film 35, then a short circuit may occur between the gate electrode 31 and the data line 32 at a crossing position like that shown in FIG. 3(a). T...

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Abstract

The present invention is directed to a thin film transistor (and related multilayer structures) that includes: source and drain electrodes 14 and 15 disposed at a specified interval above an insulating substrate 11 and formed by printing-and-plating; an a-Si film 16 disposed for the source and drain electrodes 14 and 15; a gate insulating film 17 laminated on the a-Si film 16; and a gate electrode 18 laminated on the gate insulating film 17 and formed by printing-and-plating. The a-Si film 16 and the gate insulating film 17 have an offset region 20 that uniformly extends beyond the dimensions of the gate electrode 18.

Description

[0001]The present application is a divisional of application Ser. No. 09 / 604,430 filed on Jun. 27, 2000 now U.S. Pat. No. 6,791,144, the entire contents of which is incorporated herein by its reference.BACKGROUND OF THE INVENTION[0002]The present invention relates to a thin film transistor used for a liquid crystal display of an active matrix system or the like. The invention also relates to methods for manufacturing a multilayer film structure and the thin film transistor.[0003]The liquid crystal display of an active matrix system that uses a thin film transistor is constructed in a manner that a gate electrode (Y electrode) and a data electrode (X electrode) are disposed in a matrix form, and a liquid crystal is sealed in between a TFT array substrate having a thin film transistor (TFT) disposed at an intersection thereof and an opposite substrate laminated by keeping a gap with the TFT array substrate. The liquid crystal display can perform displaying by using the thin film trans...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L21/00G02F1/136G02F1/1335G02F1/1362G02F1/1368H01L21/288H01L21/3205H01L21/336H01L21/77H01L21/84H01L27/12H01L29/417H01L29/786
CPCH01L27/12H01L29/41733H01L29/66757H01L27/1292H01L29/78633H01L29/78666H01L29/78696H01L29/78609H01L29/786
Inventor FRYER, PETER M.WISNIEFF, ROBERT L.TSUJIMURA, TAKATOSHI
Owner VIDEOCON GLOBAL
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