Semiconductor device

Abstract

The differential amplifier of a comparator circuit includes first and second n-type MOSFETs for receiving an input signal, first and second p-type MOSFETs of a current mirror circuit, and a third n-type MOSFET of a current source circuit. The output stage includes a third p-type MOSFET for transmitting a signal, and a fourth n-type MOSFET of the current source circuit. The differential amplifier further includes fifth and sixth n-type MOSFETs respectively series-connected to the first and second n-type MOSFETs. The output stage further includes a seventh n-type MOSFET series-connected to the fourth n-type MOSFET. The gates of the fifth, sixth, and seventh n-type MOSFETs are connected to voltage bias circuits. The fifth, sixth, and seventh n-type MOSFETs suppress variations in voltage at an output node caused by poor saturation characteristics of the first, second, and fourth main n-type MOSFETs.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is based upon and claims the benefit of priority from the prior Japanese Patent Applications No. 11-185860, Jun. 30, 1999; and No. 11-185863, Jun. 30, 1999, the entire contents of which are incorporated herein by reference.BACKGROUND OF THE INVENTION[0002]The present invention relates to a semiconductor device and, more particularly, to a semiconductor device using a poly-crystalline silicon (polysilicon) layer as an active region. More specifically, the first aspect of the present invention relates to a semiconductor device circuit for compensating for poor saturation characteristics of a field effect transistor having a MIS (Metal Insulator Semiconductor) structure (including a MOS (Metal Oxide Semiconductor) structure), i.e., MISFET, which are caused by using a polysilicon layer as an active region or by other causes. This circuit is used to improve the I / O (Input / Output) characteristics of a comparator circuit or logi...

AI Technical Summary

Benefits of technology

[0010]It is an object of the present invention to provide a semiconductor device circuit for improving, by circuit design, poor saturation characteristics of a MISFET caused by using a polysilicon layer as an active region or by other causes. This realizes a circuit such as a comparator circuit or CMOS logic gate circuit equivalent to an ideal single-crystalline silicon circuit.

[0011]It is another object of the present invention to provide a semiconductor protection device for suppressing a current flowing through a main semiconductor switch to a set value or less and, more particularly, to a semiconductor protection device using polysilicon as an active region. In this case, it is still another object of the present invention to reduce the manufacturing cost of an integrated circuit on which the main semiconductor switch and semiconductor protection device as integrated.

[0013]a sense circuit connecting a sense terminal, which flows a sense current branching from a current flowing through a path of the first and second main electrodes, and the control terminal of the switching element to each other, the sense circuit being configured to control the control terminal of the switching element based on the sense current to open the bypass, when the current flowing through the path of the first and second main electrodes exceeds the set value, thereby decreasing a voltage applied from the control power supply to the main control electrode.

Problems solved by technology

However, a polysilicon MOSFET, and particularly an n-type MOSFET are poorer in saturation characteristics than a single-crystalline silicon MOSFET.

A technique of integrating a vertical or horizontal high-breakdown-voltage device and its control circuit receives a great deal of attention because this technique can reduce the device area.

However, a field effect transistor having a MOS structure, i.e., MOSFET using polysilicon as an active region exhibits unique characteristics such as a higher threshold, poorer saturation characteristics, and larger gate capacitance than those of a MOSFET using a single crystal as an active region.

Images