CMOS type difference interface circuit

Abstract

A CMOS circuit with difference interface in which the difference input pole contains 4 PMOS transistors, namely M3, M4, M5 and M6; 5 NMOS transistors, namely M1, M2, M7, M8 and M9. These transistors jointly constitute NMOSFET input CMOS difference primary amplification circuit, wherein M1 and M2 are a pair of NMOS transistors, constituting geminate transistors; M3 and M5, M4 and M6, as well as M7 and M8 are double-scale mirror image current source as the load for M1 and M2; the M7 and M8 pair of current mirrors simultaneously converts double-end output into single-end output. M9 provides the direct current, i.e. tail current required by difference electric work; primary amplification circuit is linked with a secondary amplification circuit that is comprised of a PMOS transistor and a NMOS transistor Ma, wherein Ma is amplifier tube and Mb is the loading tube for Ma; the grid electrode level of the loading tube is connected with ground GND; the secondary amplification circuit is linked with the buffer output comprising two directors.

Description

technical field [0001] The invention relates to a differential interface circuit, in particular to a two-stage CMOS differential interface circuit with a special amplifier circuit. This circuit is suitable for LCD and PDP driver chips as their high-speed data transmission interface. When working, it has a high small-signal differential mode gain. At the same time, according to different system power consumption requirements, the bias level for its work has Wide range to choose from. Background technique [0002] With the development of flat-panel display technologies such as PDP and LCD, their panel sizes are getting larger and larger, which leads to higher and higher transmission rates of image signals received by the driving circuits of the display panels. If such a high-speed image signal is transmitted at the traditional TTL level, when the image signal is transmitted through cables or PCB traces, it will emit strong electromagnetic interference to the outside. not ide...

AI Technical Summary

Problems solved by technology

The CMOS differential amplifier with PMOSFET input has the following disadvantages: First, the CMOS differential amplifier with PMOSFET input has relatively high requirements on the bias level, and there is a certain optimal level value; secondly, due to the limitation of the PMOS tube itself, in order to achieve a certain differential mode Gain, the CMOS differential amplifier with PMOSFET input requires a higher gate width-to-length ratio for the differential pair tube, which will lead to an increase in the layout area. This is contrary to the requirement of smaller and smaller chip areas. It is also the current CMOS differential Difficult Problems in Common Structures of Interface Circuits

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