Phase change storage unit and method for dual shallow groove separated bipolar transistor selection
A bipolar transistor, shallow trench isolation technology, applied in the field of memory, can solve the problems of cost reduction, disadvantage, high price, etc.
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Embodiment 1
[0075] figure 1 Shown is a cross-sectional view of an embodiment memory cell, for manufacturing figure 1 For the phase-change memory cell shown, first, a medium-doped low-resistance layer is formed on a silicon substrate by ion implantation; silicon lines are carved out to form bit lines, and the etching depth is until the above-mentioned doped layer is etched , form a deep shallow trench isolation (STI); then form two layers of silicon material layers with different conductivity types in a specific area by ion implantation; prepare a bipolar transistor on the bit line by photolithography, and form a shallower STI; Finally, a phase-change memory cell is fabricated on top of a bipolar transistor to form a basic memory device structure.
[0076] The substrate of the first conductivity type may be p-type or n-type, and here a p-type substrate is taken as an example for convenience of description. Figures 2A to 2G Shown is figure 1 The specific fabrication process for the illu...
Embodiment 2
[0078] Figure 3A Shown is right Figure 2G The improvement of the structure of the bipolar transistor is prepared, and the Figure 2C After the shown bipolar transistor, a hollow bipolar transistor is formed through a semiconductor process, and the gap formed in the bipolar transistor is filled with a dielectric material 26, and then a center with a dielectric 26 is formed by chemical mechanical polishing. Ring Bipolar Transistor. This embodiment and embodiment 1 figure 1Another difference shown is that no additional electrode layer is deposited between the phase change material and the bipolar transistor, but doped silicon or silicide is directly used as a heating electrode. The thin layer silicide 27 formed on the annular bipolar transistor is obtained by ion implantation or diffusion, and it has lower electrical conductivity and lower thermal conductivity than the W metal electrode. Figure 3B Shown is Figure 3A The cross-sectional view taken along line 1-1 in the in...
Embodiment 3
[0080] The first conductivity type substrate in this embodiment is still p-type as an example. For the structure shown in Example 2
[0081] A thick n-type heavily doped low-resistance layer is formed on a p-type substrate by ion implantation, and the cross-sectional view is shown in Figure 4A shown;
[0082] The pattern is carved by photolithography, and the top view is shown in 4B, where 80 is the etched silicon line, and 81 is the deep STI directly to the formed bit line, the purpose is to separate each bit line;
[0083] Bipolar diodes are formed by ion implantation and semiconductor processes, such as Figure 4C shown;
[0084] Fill the dielectric material to form STI, where the shallower STI separates the bipolar transistors on the same bit line and forms grooves on the transistors, such as Figure 4D shown;
[0085] CVD deposition electrode layer 91 and dielectric layer 92, such as Figure 4E shown;
[0086] After chemical mechanical polishing, such as Figure ...
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