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Process for producing siliceous film and substrate with siliceous film produced thereby

A siliceous film, silicon substrate technology, applied in semiconductor/solid-state device manufacturing, gaseous chemical plating, coating, etc., can solve the problems of uneven etching rate, high etching rate, cracks, etc., and achieve excellent mechanical The effect of strength, uniform quality, uniform etch rate

Active Publication Date: 2009-02-11
MERCK PATENT GMBH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The disadvantage of this method is that when silicon hydroxide is converted into silicon dioxide, volume shrinkage occurs and cracks occur
However, according to the research of the present inventors, it has been found that in the trench isolation structure, when polysilazane is converted into silicon dioxide to form a siliceous film, the reaction conditions between the surface part of the coating film and the inside of the trench are slightly different, Therefore, the quality of the siliceous film inside the trench is different from that of the outside of the trench, or the quality of the siliceous film varies according to the depth inside the trench, resulting in a problem of non-uniform etch rate.
This problem is evident when performing low temperature processing required due to equipment design and process design constraints
Especially non-uniform etch rate produces phenomenon such as higher etch rate in trench portion with high aspect ratio

Method used

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  • Process for producing siliceous film and substrate with siliceous film produced thereby
  • Process for producing siliceous film and substrate with siliceous film produced thereby
  • Process for producing siliceous film and substrate with siliceous film produced thereby

Examples

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preparation example Construction

[0023] Preparation method of siliceous membrane

[0024] The preparation method of the siliceous film of the present invention can form a non-porous film with uniform film quality on the silicon substrate with concavities and convexities. The silicon film can thus be formed as a planarizing insulating film (premetal insulating film) for use in transistor elements or capacitor elements in electronic devices. In addition, a silicon film may be formed on a grooved silicon substrate to fill the groove, thereby forming a trench isolation structure. The present invention will be described in detail based on the method of forming the trench isolation structure.

[0025] In the method for preparing a siliceous membrane of the present invention, the process is performed according to the following steps to form a trench isolation structure:

[0026] An insulating film forming step of forming an insulating film having a hydrogen content of not less than 9×10 on the surface of a silicon...

Embodiment 1

[0093] The present invention will be described in more detail with reference to the following embodiment, together with FIG. 1 , which discloses a contemplated technique for burying an element isolation trench STI (Shallow Trench Isolation) structure.

[0094] A grooved sample was first provided for evaluation of the configuration shown in FIG. 1 . A grooved sample (five grooves are shown in the figure) was formed by depositing a silicon nitride (SiN) film 2 to a thickness of 150 nm on the upper surface of a silicon substrate 1, followed by photolithography and dry etching. In this example, for all five grooves, the width is, for example, 80 nm to 400 nm, and the depth is, for example, 450 nm (the depth of the silicon substrate portion is 300 nm).

[0095] Using TEOS as a silicon source, a 20 nm-thick silicon dioxide film 3 was deposited on the grooved sample having the above-described structure by plasma chemical vapor deposition (plasma TEOS).

[0096] The silicon dioxide f...

Embodiment 2

[0104] Samples were prepared in the same manner as in Example 1, except that a 20 nm-thick silicon nitride film was deposited by plasma chemical vapor deposition (PE-CVD) instead of the plasma TEOS film shown in FIG. 1 .

[0105] The silicon nitride film 3 was formed by the above-mentioned PE-CVD under the following film-forming conditions. SiH 4 / NH 3 Gas flow rate and source power / bias power: SiH 4 / NH 3 = 55 / 110 sccm, SRF / BRF = 4400 / 2600W, substrate temperature = 400°C.

[0106] SIMS analysis and TDS measurements showed that the plasma PE-CVD film contained excess hydrogen. Specifically, according to SIMS analysis, the hydrogen content of the membrane is about 1 × 10 21 atms / cm 3 , according to TDS analysis, it was confirmed that hydrogen was released from the membrane in vacuum at a temperature of about 350 °C, indicating that the membrane contained hydrogen.

[0107] Film formation and heat treatment using the polysilazane solution were performed in the same manner...

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Abstract

A process for producing a siliceous film with quality uniform irrespective of locality or groove interior or exterior wherein in the groove interior there is no void or crack. This substrate with siliceous film can be produced by first forming an insulating film of high hydrogen content on the surface of an uneven silicon substrate, subsequently coating the substrate with a composition containing a polysilazane compound and thereafter heating the coating product to thereby convert the polysilazane compound into a silicon dioxide film.

Description

technical field [0001] The invention relates to a method for preparing a siliceous film applied to an electronic device, and a substrate with the siliceous film prepared by the method. The present invention also relates to a method of forming a shallow trench isolation structure for insulating an electronic device using a polysilazane compound when producing an electronic device such as a semiconductor element. Background technique [0002] Generally, electronic devices such as semiconductor devices, semiconductor elements such as transistors, resistors, etc. are disposed on a substrate. They should be electrically insulating. Therefore, an element isolation area should be provided between the elements. This area is called the isolation area. Usually, the isolation region has hitherto been formed by selectively forming an insulating film on the surface of a semiconductor substrate. [0003] On the other hand, recently in the field of electronic devices, increased densifi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/316H01L21/76C23C16/40
CPCC23C16/56H01L21/02222H01L21/02337H01L21/316H01L21/76227H01L21/02282H01L21/02164H01L21/3125H01L21/02304H01L21/02326H01L21/76C23C16/40
Inventor 石川智规中熊映乃
Owner MERCK PATENT GMBH
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