Silicon device on insulator and preparation method thereof

Abstract

The invention relates to a silicon device on an insulator and a preparation method thereof, which belong to the technical field of semiconductor devices. The silicon device on the insulator is prepared from a silicon wafer on a p-shaped insulator and comprises a p-shaped bottom silicon substrate, a buried oxygen layer, an N-shaped field effect transistor and a P-shaped field effect transistor which are formed in a top layer silicon film; the N-shaped field effect transistor and the P-shaped field effect transistor are respectively positioned in a tagma zone and respectively comprise drain electrodes, source electrodes, grid electrodes and body lead-out parts; and the tagma zone containing the N-shaped field effect transistor is electrically isolated from the tagma zone containing the P-shaped field effect transistor. The silicon device on the insulator can effectively inhibit the floating body effect, has symmetrical source electrodes without extra parasitic capacitance and can be compatible with the silicon process and the design of a main flow body to the maximum extent while retaining the advantage of an SOI circuit.

Description

technical field [0001] The invention relates to a silicon-on-insulator device and a preparation method thereof, in particular to a silicon-on-insulator device prepared by using a p-type silicon-on-insulator wafer and a preparation method thereof, belonging to the technical field of semiconductor devices. Background technique [0002] Silicon-On-Insulator (SOI) technology introduces a buried oxide layer between the top silicon layer and the back substrate. By forming a semiconductor thin film on an insulator, the SOI material has the incomparable advantages of bulk silicon: it can realize the dielectric isolation of components in integrated circuits, and completely eliminate the parasitic latch effect in bulk silicon CMOS circuits; The integrated circuit also has the advantages of small parasitic capacitance, high integration density, fast speed, simple process, small short channel effect, and is especially suitable for low-voltage and low-power circuits. Therefore, it can be...

AI Technical Summary

Problems solved by technology

[0006] The present invention aims at the fact that the T-type gate and H-type gate technologies in the prior art cannot effectively suppress the floating body effect, and the wider the channel, the greater the body resistance, the more significant the floating body effect, and the source-drain asymmetry of the BTS structure, so that the source-drain cannot be interchanged , the effective channel width is reduced, and the contact of the source end introduces a large parasitic capacitance, which makes the performance of the device worse. A silicon-on-insulator device and its preparation method are provided.

Images