Low-power consumption broadband high-gain high-swing rate single-level operation transconductance amplifier

Abstract

The invention discloses a low-power consumption broadband high-gain high-slew rate single-stage operational transconductance amplifier, which is formed by successively connecting a constant current bias stage, a differential input stage and a load current mirror transmission output stage in series. The load current mirror transmission output stage comprises eight N type MOS (metal oxide semiconductor) transistors from NM1 to NM8. Through the invention, the inherent limit restraint in a linear operational amplifying circuit is thoroughly solved, and the circuit performance under static AC small signals and dynamic big signals is comprehensively improved and enhanced.

Description

technical field [0001] The invention relates to a linear transconductance single-stage operational amplifier circuit compatible with low power consumption, high speed and high precision, and belongs to the technical field of analog integrated operational amplifiers. , to obtain high-efficiency current utilization efficiency and the coordination and unity of circuit speed and accuracy under the constraints of power consumption, and to achieve an overall improvement in the static and dynamic characteristics of the circuit. Background technique [0002] In the SoC digital-analog hybrid single-chip system, the system function expansion and performance improvement have more realistic meaning only under the constraints of low power consumption. In the prior art, the improvement of circuit speed or dynamic performance usually comes at the expense of high current drive, that is, increased power consumption. The requirements of low power consumption, high speed and high precision mut...

AI Technical Summary

Problems solved by technology

[0003] For the traditional single-stage OTA linear operation transconductance circuit (see figure 1 ), under the limitation of low power supply voltage, it is difficult to make full use of the high-impedance output characteristics of the Cascode structure to achieve high gain, and it is difficult to meet the high-speed response requirements under dynamic current regulation and driving by reducing the output current to increase impedance and gain; on the contrary, when After the N value is fixed, by increasing the quiescent current I B Increase the bandwidth to obtain high-speed response driven by a large slew rate, which not only causes an increase in power consumption, but also leads to a decrease in gain

Therefore, for the traditional OTA structure, only the quiescent current I B , Input differential pair transistor transconductance factor, differential pair load current mirror W / L proportional factor N value to optimize the selection of three parameters to balance the requirements of gain, bandwidth, slew rate and power consumption, but at the same time meet the needs of all parties is extremely difficult

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