Method and structure for enhancing write-in speed of floating body dynamic random memory cell

Abstract

The invention discloses a method for enhancing a write-in speed of a floating body dynamic random memory cell. A semiconductor device is manufactured on a substrate. and then the method also comprises the following steps that: ions are implanted into a side wall film layer at a certain angle alpha that is inclined to a drain region; the side wall film layer is etched; after the etching, the width of one portion of the side wall is larger than the width of the other portion of the side wall, wherein the one portion of the side wall is close to a source end and the other portion of the side wall is close to a drain end; and doping and annealing are carried out on the semiconductor device as well as a source electrode, a drain electrode and a channel are formed on the substrate. In addition, the invention also discloses a structure for enhancing a write-in speed of a floating body dynamic random memory cell. The structure comprises a substrate, a grid, and a shallow trench isolation channel. A side wall, which is covered on a side wall of the grid, includes a source end side wall and a drain end side wall, wherein the width of the source end side wall is greater than that of the drain end side wall. Besides, a source electrode, a drain electrode and a channel are formed on the substrate; and doped ions of the drain electrode are more close to the channel than doped ions of the source electrode to the channel.

Description

technical field [0001] The invention relates to a semiconductor preparation technology, in particular to an etching process method for forming an asymmetric side wall, which is used to improve the writing speed of a floating body effect memory unit. Background technique [0002] The development of embedded dynamic memory technology has made large-capacity DRAM very common in current system-on-chip (SOC). Large-capacity embedded dynamic memory (eDRAM) brings various benefits to SoCs such as improved bandwidth and reduced power consumption that can only be achieved by using embedded technology. In addition to transistors, each memory cell of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the memory cell much larger than its width, which makes the manufacturing process difficult. Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in e...

AI Technical Summary

Problems solved by technology

In addition to transistors, each storage unit of traditional embedded dynamic memory (eDRAM) also needs a deep trench capacitor structure. The deep trench of the capacitor makes the height of the storage unit much larger than its width, which makes the manufacturing process difficult

Its manufacturing process is very incompatible with CMOS VLSI process, which limits its application in embedded system chip (SOC)

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