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Manufacturing method of source electrode and drain electrode of N metal-oxide semiconductor field effect transistor (MOS) device

A drain and source technology, applied in semiconductor/solid-state device manufacturing, semiconductor devices, electrical components, etc., can solve the problem of MOS devices losing switching characteristics, and achieve the effects of preventing punch-through, inhibiting diffusion, and reducing resistance

Active Publication Date: 2014-06-04
SEMICON MFG INT (SHANGHAI) CORP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] With the continuous reduction of the gate size of MOS devices, in the source and drain doping process, the industry needs to improve the short channel effect of MOS devices on the one hand, and to avoid the source and drain punch-through as much as possible on the other hand. The conductive channel disappears, and the MOS device loses its switching characteristics

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  • Manufacturing method of source electrode and drain electrode of N metal-oxide semiconductor field effect transistor (MOS) device
  • Manufacturing method of source electrode and drain electrode of N metal-oxide semiconductor field effect transistor (MOS) device
  • Manufacturing method of source electrode and drain electrode of N metal-oxide semiconductor field effect transistor (MOS) device

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[0033] combine Figure 7-12 Detailed description Figure 6 Shown are the specific steps of the process flow for making the source electrode 406 and the drain electrode proposed by the present invention.

[0034] Step 301, such as Figure 7 As shown, a semiconductor substrate 400 on which a gate 402 has been formed is provided (this is a simplified diagram omitting other parts of the actual NMOS device, the same below), and the gate is treated with a first doping energy and a first dopant dose. First doping 411 for amorphization of the semiconductor substrate 400 on both sides of the electrode 402;

[0035] In this step, a P well 401 is provided, and the semiconductor substrate 400 can be single crystal silicon, polycrystalline silicon or amorphous silicon; the semiconductor substrate 400 can also be silicon, germanium, gallium arsenide or silicon germanium compound; the semiconductor The substrate 400 may also have an epitaxial layer or an insulating layer silicon structure; ...

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Abstract

The invention provides a manufacturing method of a source electrode and a drain electrode of a N metal-oxide semiconductor field effect transistor (MOS) device. A semiconductor substrate possessing a grid electrode is provided. The method comprises the following steps: using first doping energy and a first doping dose to carry out amorphous first doping to the semiconductor substrate which is on two sides of the grid electrode; then, using second doping energy and a second doping dose to carry out the second doping of defect elimination to the semiconductor substrate which is the on two sides of the grid electrode; using different injection energy and an injection dose to carry out multiple ion implantation to the semiconductor substrate which is on the two sides of the grid electrode; finally annealing the semiconductor substrate. During a process of forming the source electrode and the drain electrode, through using the amorphous doping and the defect elimination doping in the invention, on one hand, atomic arrangement in the process from the amorphization to crystallization on the substrate surface possesses periodicity and many impurities are activated; on the other hand, through eliminating the defects in the source electrode and the drain electrode during the ion implantation, doping ion diffusion can be inhibited. Therefore, a NMOS device resistance can be reduced and simultaneously punchthrough of the source electrode and the drain electrode can be effectively prevented.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to the manufacturing of source electrodes and drain electrodes of NMOS devices. Background technique [0002] At present, the device structure of a typical Metal-Oxide Semiconductor Field Effect Transistor (MOS) includes: an active region, a source, a drain and a gate; wherein, the active region is located in a silicon substrate , the gate is located above the active region, and the active regions on both sides of the gate are respectively implanted with ions to form a source and a drain, and the interface between the source and the substrate, and the interface between the drain and the substrate forms a PN junction; When a voltage is applied to the MOS device, a conductive channel is formed in the silicon substrate below the gate. According to the different types of carriers in the conductive channel, MOS is divided into hole type metal oxide semiconductor field effect t...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L21/265H01L29/78
Inventor 赵猛
Owner SEMICON MFG INT (SHANGHAI) CORP