Cylindrical bump packaging structure

A packaging structure and column bump technology, applied in electrical components, electric solid devices, circuits, etc., can solve the problems of short circuit of solder bumps, easy dripping between solders, affecting welding quality, etc., to prevent short circuits and improve reliability. , The effect of saving material cost

Inactive Publication Date: 2012-07-04
NANTONG FUJITSU MICROELECTRONICS
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0012] In the process of forming wafer-level chip size packaging in the prior art, since the solder bump material is in direct contact with the metal wetting layer, the copper in the metal wetting layer easily diffuses into the tin of the solder bump to form a copper-tin alloy, which affects the welding quality
At the same time, before the solder is formed on the metal wetting lay

Method used

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Embodiment Construction

[0032] The specific embodiments of the present invention will be described in detail below in conjunction with the accompanying drawings.

[0033] figure 2 It is a schematic diagram of a stud bump package structure according to the present invention, and the package structure includes: a chip 300 , an UBM layer 303 , a copper column 305 , an oxide layer 307 and a solder bump 306 .

[0034] The upper surface of the chip 300 is provided with a pad 301 and a passivation layer 302 , and the passivation layer 302 covers the upper surface of the chip 300 except for the opening of the pad 301 .

[0035] An UBM layer 303 is disposed on the pad 301 , and the UBM layer 303 includes a heat-resistant metal layer and a metal-wetting layer sequentially from bottom to top. Specifically, the material of the heat-resistant metal layer is titanium, chromium, tantalum or a combination thereof; the material of the metal wetting layer is copper, aluminum, nickel or a combination thereof.

[003...

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Abstract

The invention relates to a cylindrical bump packaging structure. The cylindrical bump packaging structure comprises a chip, an under bump metallization layer, copper columns, oxide layers and solder bumps, wherein bonding pads and a passivation layer are arranged on the upper surface of the chip, the passivation layer is covered on the upper surface outside openings of the bonding pads of the chip, the under bump metallization layer is arranged on the bonding pads, the copper columns are arranged on the under bump metallization layer, the oxide layers are wrapped on the side surfaces of the copper columns, and the solder bumps are arranged above the copper columns. According to the cylindrical bump packaging structure disclosed by the invention, the electrical performances and the reliability of the solder bumps can be improved, and the cylindrical bump packaging structure is suitable for chip level packaging with close intervals of the bonding pads and multiple output functions.

Description

technical field [0001] The invention relates to the field of semiconductor device packaging, in particular to packaging structures of flip-chip welding, solder bumps, and wafer-level chip scale packaging (Wafer Level chip Scale Package, WLCSP). Background technique [0002] In recent years, since the microcircuit manufacturing of chips is developing toward high integration, the chip packaging also needs to develop in the direction of high power, high density, thinness and miniaturization. Chip packaging means that after the chip is manufactured, the chip is wrapped in plastic or ceramic materials to protect the chip from external moisture and mechanical damage. The main functions of the chip package are power distribution, signal distribution, heat dissipation and protection support. [0003] Since today's electronic products are required to be light, thin, small and highly integrated, the fabrication of integrated circuits will be miniaturized, resulting in an increase in ...

Claims

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Application Information

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IPC IPC(8): H01L23/00H01L23/488
CPCH01L2224/1354H01L2224/13082H01L2224/13565H01L2224/0401H01L24/11H01L24/13H01L2224/0347H01L2224/03914H01L2224/11H01L2224/1147H01L2224/11912H01L2224/13H01L2924/14H01L2924/00H01L2924/00012
Inventor 丁万春
Owner NANTONG FUJITSU MICROELECTRONICS
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