A three-strain soi Si-based BiCMOS integrated device based on crystal plane selection and its preparation method

An integrated device, three-strain technology, used in semiconductor/solid-state device manufacturing, electrical solid-state devices, semiconductor devices, etc., can solve problems such as limitation and low mobility of Si material carrier materials

Inactive Publication Date: 2016-04-13
XIDIAN UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0008] Due to the low mobility of Si material carrier materials, the performance of integrated circuits manufactured by SiBiCMOS technology, especially the frequency performance, is greatly limited; for SiGeBiCMOS technology, although SiGeHBT is used for bipolar transistors, but for the constraints The unipolar devices with improved frequency characteristics of BiCMOS integrated circuits still use SiCMOS, so these limit the further improvement of the performance of BiCMOS integrated circuits

Method used

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  • A three-strain soi Si-based BiCMOS integrated device based on crystal plane selection and its preparation method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0119] Embodiment 1: Preparation of 22nm three-strain SOISi-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:

[0120] Step 1, SOI substrate material preparation.

[0121] (1a) Select the N-type doping concentration as 1×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0122] (1b) Select the P-type doping concentration as 1×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.5 μm, which is used as the base material of the lower layer;

[0123] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the lower layer and the upper layer of substrate material after hydrogen injection;

[0124] (1d) SiO on the surface of the lower and...

Embodiment 2

[0182] Embodiment 2: Preparation of 30nm three-strain SOISi-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:

[0183] Step 1, SOI substrate material preparation.

[0184] (1a) Select the N-type doping concentration as 3×10 15 cm -3 The Si wafer with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0185] (1b) Select the P-type doping concentration as 3×10 15 cm -3 The Si sheet with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 0.75 μm, which is used as the base material of the lower layer;

[0186] (1c) Using a chemical mechanical polishing (CMP) process to polish the surface of the substrate material of the lower layer and the upper layer of the active layer after injecting hydrogen, respectively;

[0187] ...

Embodiment 3

[0245] Embodiment 3: Preparation of 45nm three-strain SOISi-based BiCMOS integrated device and circuit based on crystal plane selection, the specific steps are as follows:

[0246] Step 1, SOI substrate material preparation.

[0247] (1a) Select the N-type doping concentration as 5×10 15 cm -3 The Si sheet with a crystal plane of (110) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the upper layer, and hydrogen is injected into the base material;

[0248] (1b) Select the P-type doping concentration as 5×10 15 cm -3 The Si wafer with a crystal plane of (100) is oxidized on the surface, and the thickness of the oxide layer is 1 μm, which is used as the base material of the lower layer;

[0249] (1c) Using a chemical mechanical polishing (CMP) process to polish the lower layer and the surface of the upper substrate material after hydrogen injection;

[0250] (1d) SiO on the surface of the lower and upper substr...

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Abstract

The invention discloses a tri-strain SOI (Silicon On Insulator) Si based BiCMOS (Bipolar Complementary Metal-Oxide-Semiconductor Transistor) integrated device based on crystal face selection and a preparation method thereof. The preparation method comprises the steps of: preparing a SOI substrate; continuously growing an N-Si layer, a P-SiGe layer and an N-Si layer and depositing a dielectric layer to prepare a shallow trench isolation region of a collecting region and a shallow trench isolation region of a base region; carrying out photo-etching on the collecting region and phosphorous ion injection, forming a collecting electrode contact region and a base electrode contact region and forming a SiGe HBT (Heterojunction Bipolar Transistor) device; etching the deep trench in an NMOS (N-channel Metal Oxide Semiconductor) region, selectively growing a strain Si epitaxial layer with the crystal face (100), and preparing a strain Si channel NMOS device; selectively growing a strain Si epitaxial layer with the crystal face (110) in an active region of a PMOS (P-channel Metal Oxide Semiconductor), and preparing a compression strain SiGe channel PMOS device; and forming the tri-strain SOI Si based BiCMOS integrated device based on crystal face selection and a circuit. According to the tri-strain SOI Si based BiCMOS integrated device based on crystal face selection and the preparation method of the tri-strain SOI Si based BiCMOS integrated device based on crystal face selection, a performance-enhanced planar BiCMOS integrated circuit is prepared based on the SOI substrate by means of characteristics that the electronic mobility of the strain Si material is higher than that of the body strain Si material and the hole mobility of the compression strain Si material is higher than that of the body strain Si material and the mobility is anisotropic adequately.

Description

technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and in particular relates to a three-strain SOISi-based BiCMOS integrated device based on crystal plane selection and a preparation method. Background technique [0002] In the contemporary era of highly developed information technology, microelectronic technology represented by integrated circuits is the key to information technology. As the fastest-growing, most influential and most widely used technology in human history, integrated circuits have become an important symbol to measure a country's scientific and technological level, comprehensive national strength and national defense strength. [0003] "Moore's Law", which has had a huge impact on the development of the microelectronics industry, states that the number of transistors on an integrated circuit chip doubles approximately every 18 months, and the performance also doubles. For more than 40 years, the world...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/12H01L21/84
Inventor 胡辉勇宋建军王海栋王斌张鹤鸣宣荣喜舒斌郝跃
Owner XIDIAN UNIV
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