Preparation method for full-silicification metal gate silicon multi-gate fin field effect transistor

A technology of fully silicided metal gates and field effect transistors, which is applied in the manufacture of semiconductor/solid-state devices, semiconductor devices, electrical components, etc., can solve the problems of floating body effect and self-heating effect, poor heat dissipation, and high manufacturing cost, and achieve the goal of overcoming self- Heating effect and floating body effect, good compatibility, and the effect of reducing preparation cost

Active Publication Date: 2013-01-09
INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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  • Application Information

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Problems solved by technology

However, SOI FinFET has disadvantages such as high preparation cost, poor heat dissipation, floating body effect and self-heating effect.

Method used

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  • Preparation method for full-silicification metal gate silicon multi-gate fin field effect transistor
  • Preparation method for full-silicification metal gate silicon multi-gate fin field effect transistor
  • Preparation method for full-silicification metal gate silicon multi-gate fin field effect transistor

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Embodiment Construction

[0030] Hereinafter, the present invention is described by means of specific embodiments shown in the drawings. It should be understood, however, that these descriptions are illustrative only and are not intended to limit the scope of the present invention. Also, in the following description, descriptions of well-known structures and techniques are omitted to avoid unnecessarily obscuring the concept of the present invention.

[0031] A schematic diagram of a layer structure according to an embodiment of the invention is shown in the drawing. The figures are not drawn to scale, with certain details exaggerated and possibly omitted for clarity. The shapes of the various regions and layers shown in the figure, as well as their relative sizes and positional relationships are only exemplary, and may deviate due to manufacturing tolerances or technical limitations in practice, and those skilled in the art will Regions / layers with different shapes, sizes, and relative positions can...

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Abstract

The invention discloses a preparation method for a full-silicification metal gate silicon multi-gate fin field effect transistor. The preparation method comprises the steps: forming fins on a semiconductor substrate; forming gate piling structures at the top and on the side surfaces of the fins; forming source / drain extension area structures in the fins at two sides of the gate piling structures; forming source / drain structures at two sides of the source / drain extension areas; carrying out source / drain silicification; forming full-silicification metal gate electrodes; and contacting and metalizing. According to the preparation method, self-heating effect and floating body effect of SOI (Silicon-On-Insulator) device can be eliminated, and lower cost can be realized; the defects of polycrystalline silicon depletion effect, boron penetration effect, large series resistance and the like can be overcome; and the full-silicification metal gate silicon multi-gate fin field effect transistor can be well compatible with CMOS (Complementary Metal-Oxide-Semiconductor Transistor) plane process, thus being easy to integrate.

Description

technical field [0001] The invention belongs to the technical field of semiconductors, in particular to a method for preparing a fully silicided metal gate body silicon multi-gate fin field effect transistor. Background technique [0002] As the integrated circuit industry continues to develop in accordance with Moore's law, the feature size of CMOS devices continues to shrink, and planar bulk silicon CMOS devices have encountered severe challenges. In order to overcome these problems, it is necessary to find solutions from many aspects such as new materials, new processes, and new structures. [0003] In the field of new materials, metal gate electrode technology is a very important technology. The use of metal gate electrodes can fundamentally eliminate the polysilicon gate depletion effect and the boron (B) penetration effect of P-type field effect transistors, while obtaining very low The gate sheet resistance. Among various metal gate preparation methods, fully silici...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/336H01L21/311
CPCH01L21/311H01L29/66795
Inventor 周华杰徐秋霞
Owner INST OF MICROELECTRONICS CHINESE ACAD OF SCI
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