Split gate flash memory embedded in logical circuit and method for manufacturing memory set
A technology for separating gates and manufacturing methods, applied in circuits, semiconductor/solid-state device manufacturing, electrical components, etc., can solve problems such as memory operating speed signal transmission bandwidth limitations, etc., to achieve increased density, reduced costs, and small integrated chips. Effect
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no. 1 example
[0069] refer to figure 1 The flow shown specifically introduces the manufacturing method of the split-gate flash memory embedded in the logic circuit provided by the specific embodiment of the present invention. The split-gate flash memory embedded in the logic circuit includes three regions, the first region It is a split-gate flash memory, the second area is a high-voltage transistor, and the third area is a logic transistor. It should be noted that the second area where the high-voltage transistor is located and the third area where the logic transistor is located are both located in the peripheral circuit area in the actual layout, therefore, the positional relationship between the high-voltage transistor and the logic transistor is not affected by the diagram provided in the first embodiment. limits.
[0070] Firstly, step S11 is performed to provide a semiconductor substrate 11, the structural cross-sectional view of which is shown in figure 2 As shown, the semiconduc...
no. 2 example
[0088] Figure 16 Shown is a flow chart of a manufacturing method of a split-gate flash memory group embedded with logic circuits according to the second embodiment of the present invention. The group of split-gate flash memories embedded with logic circuits includes a pair of split-gate flash memories embedded with logic circuits of the same size, and each pair of split-gate flash memories embedded with logic circuits includes: Gate flash memory, high voltage transistors, logic transistors. The fabrication method below takes a pair of split-gate flash memories embedded with logic circuits as an example. Same as the first embodiment, the split-gate flash memory with erase gate and word line gate is still taken as an example.
[0089] Step S11' is executed to provide a semiconductor substrate 11', which includes six regions for forming a pair of identical split-gate flash memories embedded with logic circuits, such as Figure 17 As shown, the six regions are specifically: th...
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