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Preparation method of HfO2 film / HfSiNO interface layer / Si substrate gate medium

A technology of interface layer and gate dielectric, which is applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc., can solve the problems of inconsistency in the processing technology of integrated circuit chip devices, and achieve the reduction of standing wave effect, good compatibility, and plasma The effect of high volume density

Inactive Publication Date: 2013-04-24
SUZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, this method needs to be carried out at high temperature, and due to the NH 3 The corrosiveness of the gas makes it incompatible with the processing technology of modern integrated circuit chip devices

Method used

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Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0023] A HfO 2 The preparation method of thin film / HfSiNO interface layer / Si substrate gate dielectric includes the following steps:

[0024] (1) First deposit HfO with a thickness of 1.7 nm on the Si substrate 2 Gate dielectric film, the deposition method is atomic layer deposition (ALD), the deposition temperature is room temperature, and the equipment used is TFS-200 from Beneq;

[0025] (2) Then put the deposited HfO 2 The gate dielectric film / Si substrate sample was placed in a multi-frequency CCP / ICP hybrid plasma deposition system, and the power of the inductively coupled plasma source (ICP) was 100W; while the power of the capacitively coupled plasma source (CCP) was 200W, and the Enter Ar+ 5%N 2 The mixture of gas, the pressure is 10 Pa, the flow rate is 5 cm 3 / sec, the nitriding time is 90 seconds, and the HfO 2 The gate dielectric film is nitrided to obtain the structure of HfNO film / Si substrate;

[0026] (3) After annealing at 300℃ for 5 minutes under argo...

Embodiment 2

[0029] A HfO 2 The preparation method of thin film / HfSiNO interface layer / Si substrate gate dielectric includes the following steps:

[0030] (1) First, deposit HfO with a thickness of about 1.7 nm on the Si substrate 2 Gate dielectric film, the deposition method is atomic layer deposition (ALD), the deposition temperature is room temperature, and the equipment used is TFS-200 from Beneq;

[0031] (2) Put the deposited HfO 2 The gate dielectric film / Si substrate is placed in a multi-frequency CCP / ICP hybrid plasma deposition system, and the power of the inductively coupled plasma source (ICP) is 300W; while the power of the capacitively coupled plasma source (CCP) is 200W; Ar+ 20%N 2 The mixed gas, the pressure is 20 Pa, the flow rate is 20 cm 3 / sec, the nitriding time is 120 seconds, and the HfO 2 The gate dielectric film is nitrided to obtain the structure of HfON film / Si substrate;

[0032] (3) After annealing at 300 °C for 5 minutes under argon protection, a 1.7 nm...

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Abstract

The invention discloses a preparation method of HfO2 film / HfSiNO interface layer / Si substrate gate medium. The preparation method of HfO2 film / HfSiNO interface layer / Si substrate gate medium comprises the following steps: (a) cleaning, an HfO2 gate medium film deposits on a Si substrate to form a HfO2 gate medium film / Si substrate structure; (b) multi-frequency capacitance coupling / inductance coupling mixed type plasma is used for electro-discharging, at room temperature, the HfO2 film is enabled to be nitrided to an HfNO film, and an HfNO film / Si substrate structure is obtained; (c) annealing, an HfO2 film / HfSiNO interface layer / Si substrate structure is formed, and then the HfO2 film / HfSiNO interface layer / Si substrate gate medium can be obtained. The multi-frequency capacitance coupling (CCP) / inductance coupling (ICP) electro-discharging technology is adopted, the nitriding of the HfO2 film can be achieved at room temperature, compatibility with the modern semiconductor industry is good, and the practical significance is positive.

Description

technical field [0001] The present invention relates to a kind of HfO 2 Preparation method of thin film / HfSiNO interface layer / Si substrate gate dielectric. Background technique [0002] Over the past fifty years or so, the development of VLSI technology has followed Moore's Law (that is, the number of transistors that can be accommodated on an integrated circuit doubles approximately every 18 months, and the performance also doubles). In order to increase device density, response speed and chip function, the line width of semiconductor devices is continuously scaled down, which is a long-term development trend of CMOS technology. In 2010, semiconductor devices entered the era of nanoelectronics with a line width of 45nm, and in 2014, it will enter the era of 32nm technology. However, in the process of scaling down the line width, the equivalent thickness of the gate oxide layer is only a few atomic layers thick. The original technology uses silicon dioxide as the gate die...

Claims

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Application Information

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IPC IPC(8): H01L21/28H01L21/285
Inventor 诸葛兰剑余涛金成刚黄天源吴明智吴雪梅
Owner SUZHOU UNIV
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