Preparation method of la-based high dielectric constant gate dielectric material based on germanium substrate

Abstract

The invention discloses a preparation method for a germanium substrate and La-based high-dielectric constant gate dielectric material. The problems of low dielectric constant and poor thermal stability and thin film compactness of the conventional material are mainly solved. The gate dielectric material comprises an interface layer (1), a barrier layer (2), an La-based high-dielectric constant thin film (3) and a protective layer (4) from bottom to top, wherein the interface layer (1) is made from 0.5 to 1nm thick GeO2; the barrier layer (2) is made from 0.5 to 2nm thick Al2O3; the La-based high-dielectric constant thin film (3) is made from 1 to 10nm thick La2O3 or LaAlO3 or HfLaOx; and the protective layer (4) is made from 1 to 2nm thick Al2O3. The whole material is prepared by an atomic layer deposition method, and is subjected to low-temperature and high-temperature annealing treatment after being prepared. The germanium substrate and La-based high-dielectric constant gate dielectric material has the advantages of high dielectric constant, high thin film compactness, high step coverage, high thermal stability and low surface roughness, and can be used for manufacturing a gate dielectric film of a metal oxide semiconductor field effect transistor.

Description

technical field

[0001] The invention belongs to the technical field of semiconductor materials, and in particular relates to a preparation method of a La-based high-permittivity gate dielectric material based on a germanium substrate, which can be used to manufacture gate dielectric films of metal oxide semiconductor field effect transistors. Background technique

[0002] With the continuous reduction of the integration level of integrated circuits, the size of the metal oxide semiconductor field effect transistor MOSFET is continuously reduced, and the corresponding gate oxide thickness is also continuously reduced. Leakage caused by electron tunneling is increasing exponentially, and the resulting high power consumption and reliability problems are becoming more and more serious. In order to reduce the power consumption increase caused by gate oxide leakage, Intel successfully introduced high dielectric constant gate dielectric materials in the 45nm CMOS process. Due to t...

Images