Formation method of transistor

Abstract

Provided is a formation method of a transistor. The method comprises the steps that a gate dielectric layer is formed on a semiconductor substrate; impurity doping is performed on the gate dielectric layer so that a work function of the transistor is adjusted; and after impurity doping, a gate electrode is formed on the gate dielectric layer. Impurity doping is performed on the gate dielectric layer so that a work function adjusting area can be formed in the gate dielectric layer. Besides, concentration and time of impurity doping in the impurity doping process can be effectively controlled so that uniform doping can be formed and the doped impurities can be prevented from diffusing into the substrate. Furthermore, dielectric constant of the gate dielectric layer can be increased so that thickness of an equivalent oxide layer of the transistor can be reduced. In addition, impurity doping is performed on the gate dielectric layer, and a work function adjusting layer is not formed so that thickness size of the transistor can be correspondingly reduced, development of smaller characteristic size of a semiconductor technology is facilitated, and progress of the semiconductor technology is promoted.

Description

technical field [0001] The invention relates to the technical field of semiconductors, in particular to a method for forming a transistor. Background technique [0002] With the continuous development of semiconductor technology, the feature size of MOS transistors is continuously reduced, and the thickness of the gate dielectric layer of MOS transistors is also becoming thinner and thinner according to the principle of proportional reduction. When the thickness of the gate dielectric layer is thin to a certain extent, its reliability problems, especially problems related to time-related breakdown, hot carrier effect, and diffusion of impurities in the gate electrode to the substrate, will become serious. Affect the stability and reliability of the device. Now, SiO 2 As the gate dielectric layer, the layer has reached its physical thickness limit, and the high-K gate dielectric layer is used instead of SiO 2 The gate dielectric layer can greatly increase the physical thic...

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Problems solved by technology

[0007] The problem solved by the present invention is that the performance of the transistor formed by the gate-last process of forming a high-K gate dielectric layer and a metal gate in the prior art is not good

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