Successive approximation type analog-digital converter for monotonic switching mode

Abstract

The invention discloses a successive approximation type analog-digital converter for a monotonic switching mode, belongs to the field of high-speed successive approximation type analog-digital converters, and particularly relates to the field of comparator circuits. The successive approximation type analog-digital converter comprises an electric charge load distribution digital-analog converter, a comparator and a control logic unit. A redundant circuit is added to an electric charge load distribution digital-analog converter in an existing analog-digital converter, and the comparator is detuned and noise is adjusted by adding a tail current source capable of being controlled logically on an existing comparator and adjusting the proportion of tail currents inside different comparison cycles. The successive approximation type analog-digital converter has the advantages of being simple in structure, low in power consumption and high in speed. The 10-digit 100 MS/s verification successive approximation type analog-digital converter designed under the 0.13-micrometer technology can obtain the effective number of bits more than 9.3, the power consumption is only 1.7 mW, and the quality factor can reach 25.7 fJ/conv.

Description

technical field [0001] The invention relates to the circuit structure of a high-speed successive approximation (SAR) analog-to-digital converter (ADC) and the design and realization of a comparator circuit, as well as a tolerance algorithm for SAR ADC offset and noise errors. Background technique [0002] ADC is an indispensable module in communication, digital signal processing and other systems. At the same time, with the gradual development and popularity of consumer electronics, handheld devices and biomedical devices, and the development of battery technology lagging behind electronic technology, the requirements for sustainability and low power consumption of electronic devices are gradually increasing. Therefore, the development of ADC chips with high performance and low power consumption is the development direction and trend in recent years. [0003] With the advancement of integrated circuit technology, the power supply voltage must be reduced, and the intrinsic g...

AI Technical Summary

Problems solved by technology

However, due to the limitations of the process and circuit, there are comparator offset and noise errors in the SAR ADC, which will reduce the effective resolution of the system. In the monotonic switching mode, the power consumption, speed, and accuracy of the SAR ADC fluctuate greatly, resulting in The analog-to-digital converter works unstable

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