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Low-on-resistance VDMOS device and preparing method thereof

A low on-resistance and device technology, applied in the field of power semiconductor devices, can solve the problems of reducing epitaxial layer resistance R4, P-pillar and N-pillar process manufacturing difficulties, etc., to reduce junction capacitance, reduce on-resistance, and reduce channel. Effect of on-resistance

Active Publication Date: 2015-03-11
WUHAN UNIV
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Problems solved by technology

[0009]The Chinese patent "Method for Preparing Super Junction VDMOS Devices" with publication number CN 101515547B discloses that alternating P columns and N columns are produced in the epitaxial layer, thereby Change the electric field distribution in the drift region of the VDMOS device to reduce the resistance R4 of the epitaxial layer, but the manufacturing process of the P-pillar and N-pillar is relatively difficult

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  • Low-on-resistance VDMOS device and preparing method thereof
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  • Low-on-resistance VDMOS device and preparing method thereof

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[0031] figure 1 It is a schematic diagram of the cross-sectional structure of a traditional N-channel VDMOS device, figure 2 It is a schematic diagram of a specific cross-sectional structure of an N-channel VDMOS device of the present invention, image 3 It is a schematic diagram of a specific cross-sectional structure of a P-channel VDMOS device of the present invention. Taking a P-channel VDMOS device as an example, the structure and manufacturing process of the VDMOS device of the present invention will be further described.

[0032] See figure 1 , a traditional N-channel VDMOS device includes a drain (1), N + Substrate (2), N - Drift region (3), P-type base region (5), N + source area (6), P + A contact region (7), a polysilicon gate (8), a gate oxide layer (9) and a source (10). See figure 2 , this specific implementation in conventional VDMOS devices N - Drift region (3) is increased with N + The source region (6) is doped with impurities and N with the same ...

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Abstract

The invention discloses a low-on-resistance VDMOS (Vertical Double-diffused Metal Oxide Semiconductor) device and a preparing method thereof. One block of doped zone having the same doping impurities with a source zone is led in the structure of a traditional VDMOS device, and the doped zone is positioned right below a gate-oxide layer and is in close contact with a base zone and the gate-oxide layer. Correspondingly, a gate electrode above the new doped zone adopts a hollow structure. The channel on resistance and the neck zone resistance can be effectively reduced by the VDMOS device, so that the on resistance of the VDMOS device is reduced. Meanwhile, the adoption of the gate electrode of the hollow structure can avoid the influence of the new doped zone on breakdown voltage, can also reduce junction capacitance between the gate electrode and a drain electrode and increase the on-off speed of the VDMOS. The method is simple in technology and easy for industrialization.

Description

[0001] technical field [0002] The invention belongs to the technical field of power semiconductor devices, and in particular relates to a low on-resistance VDMOS (vertical double-diffused metal oxide semiconductor field-effect transistor) device and a preparation method. Background technique [0003] Power MOS (metal-oxide semiconductor) field effect transistor is a new generation of power electronic switching devices developed on the basis of MOS integrated circuit technology. VDMOS devices have been widely used in power integrated circuits and systems due to their high input impedance, fast switching speed, high operating frequency, low drive power, excellent voltage control, and thermal stability. They are mainly used in motor speed regulation. , inverters, switching power supplies, electronic switches, high-fidelity audio, automotive appliances and electronic ballasts and other fields. [0004] The on-resistance is one of the key technical indicators of VDMOS devices,...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L29/78H01L21/336
CPCH01L29/0684H01L29/66712H01L29/7802
Inventor 刘锋刘胜王国平叶双莉
Owner WUHAN UNIV
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