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Composite mask for high-energy ion implantation

A composite mask, high-energy ion technology, applied in the field of mask, can solve the problems of easy residual photoresist mask, large pattern size process error, affecting the blocking effect of thin film mask, etc., so as to avoid device process failure, The effect of avoiding the easy residue of the mask and shortening the degumming time

Inactive Publication Date: 2015-04-29
SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the hard mask avoids the bombardment denaturation and residual problems of the photoresist mask, it needs to deposit an additional dielectric film, and perform multi-step photolithography and etching, and the process is complex
The reasons why the hard mask is not suitable for HgCdTe devices are: 1) The deposition temperature of the hard mask layer is far beyond the temperature range (below 70°C) that the HgCdTe material can withstand, while the low temperature growth (2 , graphite, amorphous carbon, etc.) have a large lattice mismatch with HgCdTe materials, and the adhesion of the film is poor; 3) the hard mask requires multi-step photolithography and pattern etching, and the introduced pattern size There are many process errors, which makes it difficult to guarantee the pattern accuracy of the small-size implantation area

Method used

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Effect test

Embodiment 1

[0024] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle evaporation deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. Firstly, a cadmium telluride injection barrier layer with a thickness of ~60nm is deposited by thermal evaporation on the surface of the HgCdTe epitaxial material chip after annealing treatment and surface corrosion treatment, the chip is cleaned, and a layer of 2-3 microns in thickness is spin-coated on the chip surface A thick positive photoresist is used to expose the chip to ultraviolet light with a photolithography plate, and after developing and fixing, a photoresist injection mask is obtained.

[0025] Load the chip with the mask pattern prepared on the sample stage of the high-vacuum thermal evaporation equipment, first rotate the sam...

Embodiment 2

[0029] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle sputter deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. First, thermally evaporate and deposit ~20nm thick cadmium telluride implant barrier layer on the surface of the HgCdTe epitaxial material chip after annealing treatment and surface corrosion treatment, clean the chip, and spin coat a layer of 2-3 microns in thickness on the chip surface A thick positive photoresist is used to expose the chip to ultraviolet light with a photolithography plate, and after developing and fixing, a photoresist injection mask is obtained.

[0030] Load the chip with the prepared mask pattern on the sample stage of the magnetron sputtering equipment, first rotate the sample stage at an inclination angle of 0°, and sput...

Embodiment 3

[0034] Using the mask preparation method described in the present invention, evaporation deposition, photolithography, and positive and negative inclination angle evaporation deposition are carried out on the surface of the mercury cadmium telluride epitaxial material chip. The preparation process is shown in the attached figure 2 shown. First, thermally evaporate and deposit ~200nm thick cadmium telluride implant barrier layer on the surface of the HgCdTe epitaxial material chip after annealing treatment and surface corrosion treatment, clean the chip, and spin coat a layer of 2-3 microns in thickness on the chip surface A thick positive photoresist is used to expose the chip to ultraviolet light with a photolithography plate, and after developing and fixing, a photoresist injection mask is obtained.

[0035] Load the chip with the prepared mask pattern on the sample stage of the high-vacuum thermal evaporation equipment, first rotate the sample stage at an inclination angle...

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Abstract

The invention discloses a composite mask for high-energy ion implantation. The mask is a composite photoresist mask of a three-layer structure. According to the mask, a photoresist mask pattern is manufactured between an implantation barrier layer dielectric film and a surface layer sacrifice dielectric film and used as a high-energy ion implantation mask. By the adoption of the composite mask, the problem of chapping denaturation of the photoresist mask under high-energy ion bombardment can be solved, the mask is removed without residues, the surface cleanness of a chip is guaranteed, and device performance is improved.

Description

technical field [0001] The invention relates to mask technology in microelectronic technology, in particular to a composite mask structure for HgCdTe high-energy ion implantation. Background technique [0002] Infrared focal plane array detectors based on mercury cadmium telluride photodiodes have been widely used in military security, resource exploration, ocean monitoring, and space remote sensing. According to the device structure, HgCdTe photodiodes can be divided into n-on-p type and p-on-n type. The n-on-p process has matured after decades of technology accumulation, and the short-wave infrared (SWIR) and mid-wave infrared (MWIR) HgCdTe FPA devices based on this process have already had high performance. However, for long-wave (LW) and very long-wave (VLW) devices, in order to obtain the spectral response of the corresponding band, the band gap of the HgCdTe base material must be further reduced (<90meV). In such a narrow bandgap, the tunneling current component i...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/266
CPCH01L21/0226H01L21/0332H01L21/266H01L21/426
Inventor 施长治林春
Owner SHANGHAI INST OF TECHNICAL PHYSICS - CHINESE ACAD OF SCI
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