Method for manufacturing gate insulation layer

Abstract

The invention discloses a method for manufacturing a gate insulation layer. The method comprises successively depositing a silicon nitride layer and a silicon oxide layer on a gate according to a chemical vapor deposition method, thereby obtaining the silicon nitride layer and the gate insulation layer which is successively stacked on the gate insulation layer, wherein the gate is a Cu gate. The method for manufacturing the gate insulation layer has functions of effectively protecting the Cu gate and an active semiconductor layer, effectively isolating oxygen by the deposited silicon nitride layer for preventing oxidation of Cu, and effectively isolating hydrogen by the deposited silicon oxide layer for preventing reduction of the active semiconductor layer. Furthermore the gate insulation layer with the silicon nitride/silicon oxide stacked structure has functions of effectively blocking alkali metal ions in a glass substrate, improving antistatic discharging capability, reducing leakage current, and improving an equivalent capacitance.

Description

technical field [0001] The invention relates to the field of semiconductors, in particular to a method for manufacturing a gate insulating layer. Background technique [0002] At present, flat panel displays, such as liquid crystal display devices, organic electroluminescence display devices, etc., mainly adopt an active matrix driving mode, and a thin film transistor (TFT) in the driving circuit is used as a switching element to output signals for pixel electrodes. The performance of thin film transistors is an important factor determining the quality of display devices, and it is required to have high breakdown voltage and low leakage current to enhance reliability and effectively reduce the defective rate of display devices. [0003] Common thin film transistors generally include: an insulating substrate, a gate, a gate insulating layer, an active semiconductor layer, and a source / drain electrode layer, wherein the gate insulating layer is located between the gate and the...

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Problems solved by technology

However, there are also some problems when using the above method. The IGZO layer is very sensitive to hydrogen, and hydrogen will change the electrical properties of the IGZO layer, and even cause the active layer to change from a semiconductor to a conductor; the gate Cu is very sensitive to oxygen, and oxygen will Oxidize Cu, thus losing the proper function of the gate

[0004] At present, most thin film transistors use silicon oxide layer as the gate insulating layer, but Cu will directly form CuSi with silicon oxide. x o y While increasing the impedance, compared with silicon nitride, the dielectric constant of silicon oxide is smaller, the antistatic discharge ability is poorer, the leakage current is higher, and the blocking effect on alkali metal ions in the substrate is poor, which is easy to affect the performance of TFT

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