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A kind of semiconductor device and preparation method, electronic device

A technology of electronic devices and semiconductors, applied in the direction of semiconductor/solid-state device manufacturing, manufacturing microstructure devices, microstructure devices, etc., can solve problems such as impossibility and difficulty in removing the dielectric layer of CMOS devices

Active Publication Date: 2018-10-23
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] At present, for MEMS devices with thicker MEMS material layers, the method of deep reactive ion etching (DRIE) is usually used to form the via holes with high aspect ratio, but in the process, in the depth of more than 10um and the openings are small In the case of a CMOS device, it becomes very difficult, if not impossible, to remove the dielectric layer above the metal line

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  • A kind of semiconductor device and preparation method, electronic device
  • A kind of semiconductor device and preparation method, electronic device
  • A kind of semiconductor device and preparation method, electronic device

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preparation example Construction

[0044] In order to solve the problems existing in the semiconductor device preparation process described in the prior art, the present invention provides a new semiconductor device preparation method, the method comprising:

[0045] providing a substrate on which a CMOS device and an interconnect layer on the CMOS device are formed;

[0046] forming a dielectric layer on the substrate having a cavity overlying the interconnect layer to define a shape of a via;

[0047]forming a MEMS layer on the dielectric layer to cover the dielectric layer;

[0048] patterning the MEMS layer to form a via opening above the cavity exposing the cavity and the interconnect layer;

[0049] Filling the cavity and the opening of the through hole with a conductive material to form a through hole for connecting the CMOS device and the MEMS layer.

Embodiment 1

[0052] Attached below Figures 2a-2g A specific embodiment of the present invention will be further described.

[0053] Firstly, step 201 is executed, and a substrate 201 is firstly provided, and a CMOS device is formed on the substrate 201 .

[0054] Specifically, refer to Figure 2a , the base 201 includes a semiconductor substrate, and various active devices formed on the substrate, wherein the semiconductor substrate can be at least one of the materials mentioned below: silicon, silicon-on-insulator (SOI), silicon-on-insulator (SSOI), silicon-germanium-on-insulator (S-SiGeOI), silicon-germanium-on-insulator (SiGeOI) and germanium-on-insulator (GeOI), etc.

[0055] Various active devices are formed on the semiconductor substrate, for example, CMOS devices and other active devices are formed on the semiconductor substrate, and the active devices are not limited to a certain type.

[0056] Next, step 202 is executed to form an interconnection layer 202 on the substrate 201...

Embodiment 2

[0094] In this embodiment, in order to simplify the preparation process, the method described in Embodiment 1 can be further improved, for example, in step 203, a dielectric layer 203 is formed on the substrate 201, and a cavity is formed by patterning After that, the sacrificial material layer 204 is no longer filled, so as to define the pattern of the through hole, thereby also avoiding the step of removing the sacrificial material layer 204 in subsequent steps, and after patterning the MEMS layer 205, directly expose The interconnect layer 202 . Other steps in embodiment 2 can refer to embodiment 1.

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Abstract

The invention provides a semiconductor device, a preparation method and an electronic device. The method comprises steps: a substrate is provided, a CMOS device and an interconnection layer located on the CMOS device are formed on the substrate; a dielectric layer with a cavity is formed on the substrate, and the cavity is located above the interconnection layer to define a shape of a through hole; an MEMS layer is formed on the dielectric layer to cover the dielectric layer; the MEMS layer is patterned, a through hole is formed in the upper part of the cavity, and the cavity and the interconnection layer are exposed; conductive materials are loaded in the cavity and the through hole opening, a through hole is formed, and the CMOS device and the MEMS layer are connected. Before the MEMS layer is formed, a cavity or a sacrificial material layer is formed above the CMOS metal interconnection layer to replace the dielectric layer to be removed, and therefore etching of the dielectric layer in a depth of 10 micrometers after the MEMS layer is patterned is avoided. The preparation method is simple and practical compared with present methods, and the performances of the device are raised.

Description

technical field [0001] The present invention relates to the field of semiconductors, in particular, the present invention relates to a semiconductor device, a preparation method, and an electronic device. Background technique [0002] With the continuous development of semiconductor technology, integrated CMOS and microelectromechanical system (MEMS) devices are increasingly becoming the most advanced technology, among which CMOS devices embedded with MEMS have become the main trend of integrated CMOS due to their better performance and lower cost . [0003] Among them, in the integrated CMOS device, there are many ways to realize the connection between the CMOS device and the MEMS device, such as eutectic bonding or internal via. [0004] The eutectic bonding technology used for circuit connection will produce high contact resistance and high power supply resistance, thereby increasing the response delay and power loss of the device. [0005] However, for MEMS devices tha...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/768B81C1/00
Inventor 谢红梅
Owner SEMICON MFG INT (SHANGHAI) CORP