Secondary-side control method and secondary-side control circuit of switching power supply
A technology of control circuit and switching power supply, which is applied in control/regulation system, high-efficiency power electronic conversion, electrical components, etc. It can solve problems such as complex timing, optimized performance, and poor dynamic response, so as to improve accuracy and load adjustment rate, and speed up The effect of dynamic response and good dynamic performance
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Embodiment 1
[0031] The PFM control circuit in the master control unit of the secondary side is responsible for the frequency modulation of the turn-on signal, such as image 3 As shown, a PFM control circuit includes: PMOS tube 301, PMOS tube 302, PMOS tube 306, NMOS tube 303, NMOS tube 304, current source 305, capacitor 307, switch 308, comparator 309, inverter 310, inverter Phaser 311, D flip-flop 312, inverter 313, inverter 314, inverter 315, and delayer 316. The source terminals of the PMOS transistors 301, 302, and 306 are connected to the internal power supply voltage, the gate terminal of 301 is connected to the bias voltage Vbias1, the drain terminal is connected to the drain terminal of the NMOS transistor 303; the drain terminal of 302 is connected to its own drain terminal and the The gate terminal; the drain terminal of 306 is connected to the upper plate of the capacitor 307; the gate terminal of the NMOS tube 303 is connected to the reference voltage Vref1, and the source term...
Embodiment 2
[0045] The current-limiting voltage generation circuit of the PWM control circuit in the first embodiment can also be implemented in another way, such as Figure 5 As shown, another current-limiting voltage generation circuit includes an inverter 501, an AND gate 503, a high-frequency oscillator 502, an M-bit subtraction counter 504, an M digital-to-analog converter 505, and a buffer 506. The input terminal of the inverter 501 receives the narrow pulse turn-on signal Tonp, and the output terminal is connected to one input terminal of the AND gate 503; the other input terminal of the AND gate 503 is connected to the output terminal of the high frequency oscillator 502, and the output terminal is connected to M The input terminal of the bit subtraction counter; the output terminal of the M bit subtraction counter 504 is connected to the input terminal of the M digital to analog converter 505; the output terminal of the M digital to analog converter is connected to the positive inpu...
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