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Semiconductor structures and methods of forming them

A technology of semiconductor and gate structure, applied in the field of semiconductor structure and its formation, can solve problems such as poor performance

Active Publication Date: 2019-05-28
SEMICON MFG INT (SHANGHAI) CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] However, existing FinFETs, especially P-type FinFETs, have poor performance

Method used

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  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them
  • Semiconductor structures and methods of forming them

Examples

Experimental program
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Effect test

Embodiment Construction

[0031] As mentioned in the background, conventional FinFETs, especially P-type FinFETs, have poor performance.

[0032] After research, it is found that in the fin field effect transistor, the crystal plane on the top surface of the fin is usually (100), the crystal plane on the side wall surface of the fin is usually (110), and the atomic density of the (110) crystal plane is greater than ( 100) the atomic density of the crystal plane, so that in the process of easily forming the fin field effect transistor, based on the influence of the thermal process, more dangling bonds will be generated on the side wall surface of the fin. The dangling bonds on the sidewalls and top surfaces of the fins will form charge traps on the sidewalls and top surfaces of the fins, so that the intensity of the electric field received by the channel region of the fin field effect transistor changes, thereby causing a P-type fin field effect transistor. The effect transistor produces a negative bias...

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PUM

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Abstract

The invention discloses a semiconductor structure and a formation method thereof. The formation method of the semiconductor structure comprises the following steps: forming semiconductor layers at sidewalls and top surfaces which are exposed out of fin portions, wherein the semiconductor layers are doped with P-type ions; doping threshold-voltage adjustment ions in the fin portions; and doping the P-type ions in the semiconductor layers, and performing an annealing process after the threshold-voltage adjustment ions are doped in the fin portions. When a P-type fin field effect transistor is formed through the formed semiconductor structure, the negative bias temperature instability of the P-type fin field effect transistor is inhibited, and the performance is improved.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] With the rapid development of semiconductor manufacturing technology, semiconductor devices are developing towards higher element density and higher integration. As the most basic semiconductor device, transistors are currently being widely used. Therefore, with the increase of component density and integration of semiconductor devices, the gate size of planar transistors is getting shorter and shorter. The ability of traditional planar transistors to control channel current Weakened, resulting in short channel effect, resulting in leakage current, and ultimately affecting the electrical performance of semiconductor devices. [0003] In order to overcome the short-channel effect of the transistor and suppress the leakage current, a Fin Field Effect Transistor (Fin FET) is pr...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/336H01L29/78H01L29/06H01L21/324
CPCH01L21/324H01L29/0607H01L29/1033H01L29/66795H01L29/785
Inventor 李勇
Owner SEMICON MFG INT (SHANGHAI) CORP
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