A single crystal silicon infrared thermal stack structure including a beam membrane structure and its manufacturing method
A production method and technology of single crystal silicon, applied in the direction of microstructure technology, microstructure device, manufacturing microstructure device, etc., can solve the problems of difficult processing, high cost, large thermal pile size, etc., and achieve high sensitivity, small size, The effect of simple process
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Embodiment 1
[0063] Such as Figure 1a ~ Figure 1f As shown, the present embodiment provides a method for manufacturing a single crystal silicon infrared thermal pile structure, and the method at least includes the following steps:
[0064] First execute step 1), such as Figure 1a As shown, a single crystal silicon wafer 1 is provided, and a surface of the single crystal silicon wafer 1 is etched to form a plurality of isolation grooves 2 .
[0065] As an example, the single crystal silicon wafer 1 is an N-type or P-type (111) single-sided (or double-sided) polished silicon wafer. In this embodiment, a P-type single crystal silicon wafer 1 is used, with a thickness of 450 μm and an off-axis of 0±0.1°.
[0066] As an example, a deep reactive ion etching (Deep-RIE) process is used to etch the isolation trench 2 on the front surface of the single crystal silicon wafer. The isolation groove 2 is used to isolate two adjacent single crystal silicon beams 9 formed in subsequent fabrication. T...
Embodiment 2
[0089] Such as Figure 2a ~ Figure 2h As shown, the present embodiment provides a method for manufacturing a single crystal silicon infrared thermal pile structure, and the method at least includes the following steps:
[0090] First execute step 1), such as Figure 2a As shown, a single crystal silicon wafer 1 is provided, and a surface of the single crystal silicon wafer 1 is etched to form a plurality of isolation grooves 2 .
[0091] As an example, the single crystal silicon wafer 1 is an N-type or P-type (111) single-sided (or double-sided) polished silicon wafer. In this embodiment, a P-type single crystal silicon wafer 1 is used, with a thickness of 450 μm and an off-axis of 0±0.1°.
[0092] As an example, a deep reactive ion etching (Deep-RIE) process is used to etch the isolation trench 2 on the front surface of the single crystal silicon wafer. The isolation groove 2 is used to isolate two adjacent single crystal silicon beams 9 formed in subsequent fabrication. Th...
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