Capacitor sequencing method capable of improving linearity of resistance-capacitance type successive approximation analog-to-digital converter

Abstract

The invention discloses a capacitor sequencing method capable of improving linearity of a resistance-capacitance type successive approximation analog-to-digital converter, belongs to a successive approximation analog-to-digital converter, and is applied to a high-speed high-precision analog-to-digital converter in the field of microelectronics and solid electronics. Without any correction algorithm, the method only needs to sequence and reconstruct capacitors. The capacitor sequencing method prevents errors of capacitor mismatching in the same code word from accumulating. Therefore, compared with a conventional a correction method relying on a correction algorithm to improve linearity, the capacitor sequencing method has the effects that the structure is easier, the chip occupation area is smaller, and operations can be realized on chips more easily.

Description

technical field [0001] The invention relates to a successive approximation analog-to-digital converter, which is a high-speed and high-precision analog-to-digital converter used in the fields of microelectronics and solid-state electronics. Background technique [0002] In recent years, the development of information technology has led to the rapid development of technologies such as portable medical instruments, communications industry, security inspection systems, high-performance computing, biomedicine, and digital signal processing, leading to the rapid development of radar, communications, electronic countermeasures, aerospace, measurement and control, and earthquakes. The demand for high-precision, low-power analog-to-digital converters (ADCs) in electronic equipment such as medical, instrumentation, etc. is increasing day by day. The ADC converts real-world analog signals into digital signals. A complete digital information system must include ADCs and digital-to-anal...

AI Technical Summary

Problems solved by technology

The auxiliary ADC correction technology has high precision and is easy to integrate on-chip. However, in addition to the design of the main ADC, this correction method also needs to design another more accurate auxiliary ADC, which increases the complexity of the design and increases the power consumption and power consumption of the chip. area

Scheme 3: "Least mean square error" (LMS) algorithm digital correction method, the literature includes W.Liu, P.Huang, Y.Chiu, "A 12-bit, 45-MS / s, 3-mW Redundant Successive Approximation Register analog-to-DigitalConverter With Digital Calibration," IEEE Journal of Solid-State Circuits, 2011, 46(11): 2661–2672; this method converts the same input voltage twice, and the LMS algorithm is based on the difference between the two ADC conversion results , to calculate the capacitance mismatch error and correct it. Although this algorithm does not require an accurate reference source, converting the same input voltage twice will cause the sampling rate to be reduced by half, which seriously sacrifices the speed.

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