Oxide thin film transistor and its preparation method, array substrate and display device

An oxide thin film and transistor technology, applied in transistors, semiconductor/solid-state device manufacturing, semiconductor devices, etc., can solve the problems of inconsistent three-layer metal etching rate, easy formation of eaves, chamfering, damage, etc., to reduce the patterning process. times, reducing the number of metal layers, and improving electrical performance

Active Publication Date: 2020-12-01
BOE TECH GRP CO LTD +1
View PDF6 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Although the BCE type oxide TFT overcomes the problem of alignment, the channel 240 of the thin film transistor is easily damaged when the source and drain are etched, that is, the material indium gallium zinc oxide (Indium Galuminum Zinc Oxide) that constitutes the channel 240 is damaged. oxide, IGZO) is damaged, resulting in a decrease in the electrical performance of the BCE type Oxide TFT
Therefore, before the passivation layer 260 is formed, N 2 O plasma treatment to improve channel damage, but N 2 O plasma treatment will affect the performance of the source and drain metal copper copper, therefore, the source electrode 251 and the drain electrode 252 of the BCE type oxide TFT generally use three layers, that is, cover a layer of top metal layer on the source and drain metal layer and A bottom metal layer is set under the source and drain metal layers for protection. For example, MoNb is used as the metal material for making the top metal layer and the bottom metal layer, but the etching rate of the three layers of metal is inconsistent, and it is very easy to form eaves, chamfers, etc. problems that affect the electrical performance of oxide thin film transistors

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Oxide thin film transistor and its preparation method, array substrate and display device
  • Oxide thin film transistor and its preparation method, array substrate and display device
  • Oxide thin film transistor and its preparation method, array substrate and display device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0034] In order to make the above objects, features and advantages of the present invention more clearly understood, the present invention will be described in further detail below with reference to the accompanying drawings and specific embodiments.

[0035] In the description of the present invention, unless otherwise stated, "plurality" means two or more; the terms "upper", "lower", "left", "right", "inner", "outer" The orientation or positional relationship indicated by etc. is based on the orientation or positional relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the referred machine or element must have a specific orientation, a specific orientation, and a specific orientation. The orientation configuration and operation are therefore not to be construed as limitations of the present invention.

[0036] In the description of the p...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention provides an oxide thin film transistor, a preparation method thereof, an array substrate and a display device. In the preparation method of the oxide thin film transistor provided by the present invention, the channel protection layer is formed by oxidizing the first metal layer between the source and drain during the patterning process for forming the source and drain. Therefore, under the premise that the number of patterning processes is small, a channel protective layer that effectively protects the channel can be formed, and the electrical performance of the oxide thin film transistor is effectively improved.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to an oxide thin film transistor and a preparation method thereof, an array substrate and a display device. Background technique [0002] Oxide Thin Film Transistor (Oxide TFT) is currently used more and more in LCD and OLED because of its high mobility, low off-state current, simple process, and low equipment and fabrication costs. [0003] Specifically, oxide thin film transistors are mainly classified into an etch stop layer (ESL) type and a back channel etch (BCE) type. like figure 1 Shown is a schematic cross-sectional structure diagram of an etch barrier type oxide thin film transistor in the prior art. The ESL type Oxide TFT includes: a substrate 110, a gate electrode 120, a gate insulating layer 130, a channel 140, a barrier layer 150, The via holes 151 and 152 , the source electrode 161 , the drain electrode 162 , and the passivation layer 170 . When the source ...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/786H01L29/10H01L29/06H01L21/336
CPCH01L29/0684H01L29/1025H01L29/66742H01L29/78606H01L29/66969H01L29/7869H01L29/41733H01L27/1225H01L29/42384
Inventor 刘晓伟刘勃王洋李梁梁刘正吴洪江袁剑峰
Owner BOE TECH GRP CO LTD
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products