TSV switching plate for system in package

A system-in-package, adapter board technology, applied in the direction of semiconductor/solid-state device components, diodes, semiconductor devices, etc., can solve problems such as inability to meet, achieve high heat dissipation capacity, enhanced antistatic capacity, small leakage current and parasitic The effect of capacitors

Active Publication Date: 2018-06-01
INST OF FLEXIBLE ELECTRONICS TECH OF THU ZHEJIANG
View PDF7 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] With the continuous advancement of microelectronics technology, it is no longer possible to meet actual needs by only relying on integrating more devices on a single chip to improve chip performance.

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • TSV switching plate for system in package
  • TSV switching plate for system in package
  • TSV switching plate for system in package

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0030] See figure 1 , figure 1 It is a schematic structural diagram of a TSV interposer board for system-in-package provided by an embodiment of the present invention, including:

[0031] Si substrate 101;

[0032] At least two TSV regions 102 are provided in the Si substrate 101;

[0033] At least two isolation regions 103 are arranged in the Si substrate 101 and located between every two TSV regions 102;

[0034] The diode 104 is arranged on the isolation region 103;

[0035] The interconnection line 105 connects the first end surface of the TSV area 102 and the diode 104 in series.

[0036] Specifically, it also includes a passivation layer 106, which is disposed on the Si substrate 101 and used to isolate the TSV region 102 from the diode 104 and the diode 104.

[0037] Preferably, the material in the TSV region 102 is polysilicon, and the doping concentration of the polysilicon is 2×10 21 cm -3 , The doped impurity is phosphorus.

[0038] Preferably, the TSV region 102 penetrates the ...

Embodiment 2

[0047] Please refer to figure 2 , figure 2 This is a flow chart of a method for preparing a TSV interposer board for system-in-package according to an embodiment of the present invention. Based on the above embodiments, the method for preparing the TSV interposer board of the present invention is described in detail in this embodiment as follows . Specifically, it includes the following steps:

[0048] S201. Select a Si substrate;

[0049] S202, preparing multiple TSVs on the Si substrate by using an etching process;

[0050] S203, depositing polysilicon material on the Si substrate to fill the TSV to form a TSV area;

[0051] S204: preparing multiple isolation regions on the Si substrate between the TSV regions;

[0052] S205, preparing a diode with a lateral structure on the isolation region;

[0053] S206, preparing a copper interconnection line on the upper surface of the Si substrate by using an electroplating process;

[0054] S207, using a chemical mechanical polishing (Chemica...

Embodiment 3

[0095] In this embodiment, on the basis of the foregoing embodiment, specific parameters in the method for preparing the TSV adapter plate of the present invention are described as follows. Specifically, please refer to Figure 3a-Figure 3h , Figure 3a-Figure 3h It is a flowchart of another method for preparing a TSV interposer board for system-in-package provided by an embodiment of the present invention.

[0096] S301. Select Si substrate 301, such as Figure 3a Shown

[0097] Preferably, the doping concentration of the Si substrate is 10 14 ~10 17 cm -3 , The thickness is 150 ~ 250μm.

[0098] S302, such as Figure 3b As shown; using an etching process to prepare three TSV302 on a Si substrate, which may include the following steps:

[0099] S3021, at a temperature of 1050℃~1100℃, grow a layer of 800nm~1000nm SiO on the surface of the Si substrate by thermal oxidation process 2 Floor;

[0100] S3022, using a photolithography process to complete the TSV etching pattern through steps...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

PropertyMeasurementUnit
Doping concentrationaaaaaaaaaa
Depthaaaaaaaaaa
Depthaaaaaaaaaa
Login to view more

Abstract

The invention relates to a TSV switching plate for a system in package. The TSV switching plate comprises a Si substrate (101), at least two TSV regions (102) arranged in the Si substrate (101), at least two isolation regions (103) arranged in the Si substrate (101) and located between each two TSV regions (102), diodes (104) arranged on the isolation regions (103), and interconnection lines (105)used for serial connection of first end surfaces of the TSV regions (102) and the diodes (104). According to the TSV switching plate, the diodes are processed on the TSV switching plate as ESD protection devices so that the problem of weak antistatic capacity of an integrated circuit system in package based on the TSV process is solved, and the antistatic capacity of the integrated circuit systemin package is enhanced.

Description

Technical field [0001] The invention belongs to the technical field of semiconductor integrated circuits, and particularly relates to a TSV adapter board for system-in-package. Background technique [0002] With the continuous progress of microelectronics technology, only relying on integrating more devices on a single chip to improve the performance of the chip can no longer meet the actual demand. Therefore, stacked chip packaging technology has gradually become the mainstream of technological development. The stacked chip packaging technology is a packaging technology in which multiple chips are stacked in a vertical direction in the same package without changing the size of the package. Among them, the Through-Silicon Via (TSV for short) transfer board is a connecting board that realizes the interconnection of upper and lower chips, which can not only reduce the length of the interconnection line, but also reduce the power consumption of the circuit. [0003] In the semicondu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L21/762H01L21/768H01L23/538H01L27/02
CPCH01L21/762H01L21/76898H01L23/5384H01L27/0255
Inventor 张捷
Owner INST OF FLEXIBLE ELECTRONICS TECH OF THU ZHEJIANG
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap