Three-dimensional photoelectric integrated filter realized based on CMOS post-process and preparation method thereof

Abstract

The invention provides a three-dimensional photoelectric integrated filter and a preparation method thereof. The three-dimensional photoelectric integrated filter comprises an isolation layer, a firstphotoelectric device layer, a monitoring layer, a buffer layer, a second photoelectric device layer and a protection layer, which are deposited on a CMOS integrated circuit in sequence from the bottom up. A plurality of through holes pass through the layers above. Each through hole is filled with metal, which makes contact with an electrode of the CMOS integrated circuit. An interconnection electrode is arranged above each through hole. The first photoelectric device layer is used for preparing a lower filter interacting with the CMOS integrated circuit; and the second photoelectric device layer is used for preparing an upper filter for optical interconnection with the first photoelectric device layer. The three-dimensional photoelectric integrated filter not only can solve the problem ofloss and crosstalk of optoelectronic integrated optical interconnection in a single plane, realizes multidimensional optoelectronic integration in a plurality of planes and improves the density of photoelectron integration and the complexity of an optical interconnection system, but also can solve the problem of dependency of a microloop filter on environment temperature; and through automatic thermal tuning of a bottom temperature control circuit for the upper filter, a purpose of wide operating temperature range is realized.

Description

technical field [0001] The invention relates to the technical field of optoelectronic integration, in particular to a three-dimensional optoelectronic integrated filter based on post-CMOS technology and a preparation method thereof. Background technique [0002] With the continuous development of integrated circuit technology in the direction of high speed and high integration, Moore's Law is facing the ultimate challenge of chip integration. Traditional electrical interconnection inevitably has problems such as high delay, high power consumption, and severe signal crosstalk. So people turned their attention to a new generation of interconnection technology - optical interconnection. Optical interconnection has the advantages of wide bandwidth, anti-electromagnetic interference, strong confidentiality, low loss and low power consumption, while silicon-based optical interconnection can play the advantages of wide bandwidth, low crosstalk, low loss and compatibility with CMOS ...

AI Technical Summary

Problems solved by technology

The advantage of the multiplexer and demultiplexer based on the microring filter is small size and easy on-chip integration. The disadvantage is that it is extremely sensitive to temperature changes and has very strict requirements on the working temperature. A small temperature drift will lead to a drift of the center wavelength.

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