Semiconductor device and formation method thereof

Abstract

The invention provides a semiconductor device and a formation method thereof. The method comprises the steps of forming a semiconductor substrate, wherein the semiconductor substrate comprises a gateregion, a first region and a second region, the first region and the second region are respectively arranged at two sides of the gate region, an epitaxial layer is arranged in the semiconductor substrate at the first region, and the energy gap of the epitaxial layer is smaller than the energy gap of the semiconductor substrate; forming a first doping region in the epitaxial layer at the first region, wherein first doping ions are arranged in the first doping region; forming a gate structure on the semiconductor substrate at the gate region; and forming a second doping region in the semiconductor substrate at the second region, wherein second doping ions are arranged in the second doping region, and the conductive type of the second doping ions is opposite to the conductive type of the first doping ions. The bandgap of the epitaxial layer is smaller than the bandgap of the semiconductor substrate, the barrier width of a contact surface of the first doping region and a channel region isrelatively small, and thus, the subthreshold slope of the formed semiconductor device can be reduced.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a semiconductor device and a forming method thereof. Background technique [0002] With the improvement of the integration level of semiconductor devices, the critical dimensions of transistors are continuously reduced, and the reduction of critical dimensions means that more transistors can be arranged on a chip. However, with the sharp reduction of transistor size, CMOS field effect transistors face great challenges, such as increased short channel effects, increased leakage current, and subthreshold slope with a limit of 60mV / dec at room temperature. [0003] In order to adapt to the reduction of transistor size, suppress the short channel effect, and reduce the subthreshold slope, TFET (tunnelfield-effect transistor, tunneling field-effect transistor) emerged as the times require. TFET is a metal oxide semiconductor gated PIN diode. TFET mainly uses the ...

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Problems solved by technology

[0004] However, since the subthreshold slope of a TFET is a strong function of the gate voltage, the subthreshold characteristics of the device tend to deteriorate as the gate voltage increases

Therefore, the TFET formed by the prior art still has the problem of high subthreshold slope

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