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Electronic synapse device and manufacturing method

A technology of electronic synapse and manufacturing method, which is applied in semiconductor/solid-state device manufacturing, electrical components, semiconductor devices, etc. It can solve the problems of easy loss of weight and low linearity of resistance adjustment, so as to improve linearity and device synapse Performance, Simplification Predictable Effects

Active Publication Date: 2020-11-03
FUZHOU UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, transistor-based electronic synaptic devices have the characteristics of low resistance adjustment linearity and easy loss of weight during the transition process.

Method used

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  • Electronic synapse device and manufacturing method
  • Electronic synapse device and manufacturing method
  • Electronic synapse device and manufacturing method

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0042] An electronic synaptic device has a structure such as figure 1 As shown, the heavily doped silicon / silicon dioxide substrate 04, the Ti with a thickness of 110 nm as the source electrode 01, the linear zinc oxide with a length of 10 μm and a diameter of 100 nm as the medium 02, and Ti with a thickness of 110 nm as the The drain electrode 03 constitutes.

[0043] The zinc oxide nanowires are subjected to plasma bombardment treatment, and the specific manufacturing steps are as follows:

[0044] First, 100 watts of argon plasma was used to treat the ZnO nanowires for 120 seconds, and then the plasma-treated ZnO nanowires were sprinkled on the heavily doped silicon / silicon dioxide substrate, and then the source and drain electrodes were sputtered by magnetron sputtering. fabricated on ZnO nanowires.

[0045] Perform an electrical test on the transistor in this embodiment, figure 2 It is the transfer characteristic curve of the transistor before and after plasma treatme...

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Abstract

The invention relates to an electronic synapse device, which comprises a heavily-doped silicon / silicon dioxide substrate, an oxide linear medium, a source electrode and a drain electrode, wherein heavily-doped silicon of the heavily-doped silicon / silicon dioxide substrate serves as a grid electrode; the oxide linear medium is arranged on the heavily-doped silicon / silicon dioxide substrate and serves as a conductive channel; the source electrode and the drain electrode are respectively arranged at two ends of the oxide linear medium and form electric contact with the heavily-doped / silicon dioxide substrate. The linearity of resistance regulation is enhanced by plasma treatment, the weight loss in the transformation process is reduced, and the device is enabled to be more advantageous for being used as an electronic synapse.

Description

technical field [0001] The invention relates to the technical field of microelectronic devices, in particular to an electronic synaptic device and a manufacturing method. Background technique [0002] In order to break through the limitations of the traditional von Neumann architecture, people have begun to work on the simulation of synaptic behavior on a single electronic device in order to obtain a brain-like computing chip with high-density integration and low power consumption. The use of one-dimensional nanowire materials to fabricate electronic synaptic devices based on three-terminal transistors is not only conducive to the reduction of device power consumption, but also facilitates the construction of neuromorphic devices due to the advantages of wide range of conductance adjustment, simultaneous reading and writing, and multi-channel input. computing architecture. [0003] For a single electronic synapse device, linear weight adjustment can make the whole device pl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/78H01L29/06H01L21/263
CPCH01L21/263H01L29/0684H01L29/78
Inventor 赖云锋陈凡陈帅程树英林培杰俞金玲
Owner FUZHOU UNIV
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