Semiconductor device and manufacturing method for semiconductor device

Abstract

The invention relates to a semiconductor device and a manufacturing method for the semiconductor device. The invention aims to improve performance of the semiconductor device which comprises a compound semiconductor element and a silicon semiconductor element. The semiconductor device includes insulating substrate; a compound semiconductor layer provided in a first region of a surface of the insulating substrate; and a silicon layer provided in a second region, differing from the first region, of the surface of the insulating substrate. The semiconductor device further includes: a first gate electrode provided on a surface of the compound semiconductor layer; a pair of conductive members provided at positions on the surface of the compound semiconductor layer to sandwich the first gate electrode between the pair of conductive members; a second gate electrode provided on a surface of the silicon layer; and a pair of diffusion layers provided at positions in the silicon layer to sandwichthe second gate electrode between the pair of diffusion layers. One of the conductive members is electrically connected to one of the diffusion layers.

Description

technical field [0001] The present invention relates to a semiconductor device and a method of manufacturing the semiconductor device. Background technique [0002] The following techniques are known as techniques related to the combination of a compound semiconductor element made of a compound semiconductor such as GaN and a silicon semiconductor element made of silicon. [0003] For example, Patent Document 1 describes a semiconductor in which a chip formed with a normally-on transistor made of a compound semiconductor such as GaN and a chip formed with a normally-off transistor made of silicon are cascode-connected. device. [0004] Patent Document 2 describes a power semiconductor device comprising a normally-off switch in which a normally-off MOSFET made of Si is formed on a normally-on JFET made of SiC. [0005] Patent Document 3 describes a semiconductor device including: a silicon single crystal substrate, a silicon LSI formed on the silicon single crystal substrat...

AI Technical Summary

Problems solved by technology

[0012] According to the semiconductor device described in Patent Document 1, wires are used for connection between chips, and there is a possibility that the high-speed operation performance and low on-resistance performance characteristics of the compound semiconductor element may be lost due to the resistance component or inductance component of the wires.

[0013] According to the semiconductor device described in Patent Document 2, the JFET made of SiC and the MOSFET made of Si are vertically stacked, so epitaxial growth is often used, and the manufacturing process becomes complicated and the manufacturing cost increases.

In addition, the stacked structure of silicon-silicon oxide film-SiC operates as a capacitor, so there is a possibility of forming a capacitive junction and causing problems in the operation of the semiconductor element

[0014] According to the semiconductor device described in Patent Document 3, the compound semiconductor element is formed directly on the silicon single crystal substrate, so the influence of the high voltage applied to the compound semiconductor element reaches the silicon LSI via the silicon single crystal substrate, causing malfunction of the silicon LSI. possibility of

Furthermore, since the compound semiconductor element and the silicon LSI are used to commonize the silicon single crystal substrate, there is a possibility of latch-up due to application of high voltage to the compound semiconductor element, etc.